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Searched refs:PLL_SRIF_DPLL2_PLL_PWD_SET (Results 1 – 1 of 1) sorted by relevance

/arch/mips/mach-ath79/qca956x/
A Dclk.c26 #define PLL_SRIF_DPLL2_PLL_PWD_SET(x) \ macro
228 PLL_SRIF_DPLL2_PLL_PWD_SET(1) | PLL_SRIF_DPLL2_OUTDIV_SET(1) | in qca956x_pll_init()
233 PLL_SRIF_DPLL2_PLL_PWD_SET(1) | PLL_SRIF_DPLL2_OUTDIV_SET(3) | in qca956x_pll_init()
238 PLL_SRIF_DPLL2_PLL_PWD_SET(1) | PLL_SRIF_DPLL2_PHASE_SHIFT_SET(6), in qca956x_pll_init()
243 PLL_SRIF_DPLL2_PLL_PWD_SET(1) | PLL_SRIF_DPLL2_PHASE_SHIFT_SET(6), in qca956x_pll_init()

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