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Searched refs:RIFSC_RISC_PER0_CIDCFGR (Results 1 – 1 of 1) sorted by relevance

/arch/arm/mach-stm32mp/stm32mp2/
A Drifsc.c18 #define RIFSC_RISC_PER0_CIDCFGR(id) (0x100 + 0x8 * (id)) macro
143 cid_reg_value = readl(base + RIFSC_RISC_PER0_CIDCFGR(id)); in rifsc_check_access()
225 cid_reg_value = readl(plat->base + RIFSC_RISC_PER0_CIDCFGR(id)); in stm32_rifsc_child_pre_probe()
253 cid_reg_value = readl(plat->base + RIFSC_RISC_PER0_CIDCFGR(id)); in stm32_rifsc_child_post_remove()

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