RIFSC_RISC_PER0_SEMCR (reference) in projects: arch

Searched refs:RIFSC_RISC_PER0_SEMCR (Results 1 – 1 of 1) sorted by relevance

/arch/arm/mach-stm32mp/stm32mp2/
A D	rifsc.c	`19 #define RIFSC_RISC_PER0_SEMCR(id) (0x104 + 0x8 * (id)) macro 66 void addr = base + RIFSC_RISC_PER0_SEMCR(id); in stm32_rif_is_semaphore_available() 73 void addr = base + RIFSC_RISC_PER0_SEMCR(id); in stm32_rif_acquire_semaphore() 91 void *addr = base + RIFSC_RISC_PER0_SEMCR(id); in stm32_rif_release_semaphore() 144 sem_reg_value = readl(base + RIFSC_RISC_PER0_SEMCR(id)); in rifsc_check_access()`

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