Searched refs:SET_PLL (Results 1 – 1 of 1) sorted by relevance
| /arch/arm/mach-exynos/ |
| A D | exynos4_setup.h | 325 #define SET_PLL(mdiv, pdiv, sdiv) ((ENABLE << 31)\ macro
334 #define APLL_CON0_VAL SET_PLL(APLL_MDIV, APLL_PDIV, APLL_SDIV)
345 #define MPLL_CON0_VAL SET_PLL(MPLL_MDIV, MPLL_PDIV, MPLL_SDIV)
356 #define EPLL_CON0_VAL SET_PLL(EPLL_MDIV, EPLL_PDIV, EPLL_SDIV)
366 #define VPLL_CON0_VAL SET_PLL(VPLL_MDIV, VPLL_PDIV, VPLL_SDIV)
|
Completed in 4 milliseconds