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Searched refs:SNVS_BASE_ADDR (Results 1 – 7 of 7) sorted by relevance

/arch/arm/mach-imx/
A Dsnvs.c18 val = readl(SNVS_BASE_ADDR + SNVS_HPCOMR); in init_snvs()
20 writel(val, SNVS_BASE_ADDR + SNVS_HPCOMR); in init_snvs()
/arch/arm/mach-imx/imx8m/
A Dpsci.c231 SNVS_BASE_ADDR + SNVS_LPCR); in psci_system_off()
A Dsoc.c578 writel(SNVS_LPPGDR_INIT, SNVS_BASE_ADDR + SNVS_LPLVDR); in imx8m_setup_snvs()
580 writel(0xffffffff, SNVS_BASE_ADDR + SNVS_LPSR); in imx8m_setup_snvs()
/arch/arm/mach-imx/mx7/
A Dpsci-mx7.c257 val = readl(SNVS_BASE_ADDR + SNVS_LPCR); in psci_system_off()
259 writel(val, SNVS_BASE_ADDR + SNVS_LPCR); in psci_system_off()
/arch/arm/include/asm/arch-imx8m/
A Dimx-regs.h30 #define SNVS_BASE_ADDR 0x30370000 macro
/arch/arm/include/asm/arch-mx6/
A Dimx-regs.h197 #define SNVS_BASE_ADDR (AIPS1_OFF_BASE_ADDR + 0x4C000) macro
/arch/arm/include/asm/arch-mx7/
A Dimx-regs.h112 #define SNVS_BASE_ADDR (AIPS1_OFF_BASE_ADDR+0x170000) macro

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