Searched refs:SPRN_L1CSR1 (Results 1 – 3 of 3) sorted by relevance
| /arch/powerpc/cpu/mpc85xx/ |
| A D | release.S | 104 mtspr SPRN_L1CSR1,r2
106 mfspr r3,SPRN_L1CSR1
112 mtspr SPRN_L1CSR1,r3
115 mfspr r3,SPRN_L1CSR1
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| A D | start.S | 833 mtspr SPRN_L1CSR1,r2
835 mfspr r3,SPRN_L1CSR1
841 mtspr SPRN_L1CSR1,r3
844 mfspr r3,SPRN_L1CSR1
995 mtspr SPRN_L1CSR1,r3
998 mfspr r4,SPRN_L1CSR1
1006 mtspr SPRN_L1CSR1,r3
1009 mfspr r4,SPRN_L1CSR1
1045 mfspr r11, SPRN_L1CSR1
1049 mtspr SPRN_L1CSR1, r11
[all …]
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| /arch/powerpc/include/asm/ |
| A D | processor.h | 487 #define SPRN_L1CSR1 0x3f3 /* L1 Instruction Cache Control and Status Register 1 */ macro
730 #define L1CSR1 SPRN_L1CSR1
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