Searched refs:SS (Results 1 – 8 of 8) sorted by relevance
| /arch/x86/include/asm/ |
| A D | ptrace.h | 22 #define SS 16 macro
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| /arch/arm/mach-sunxi/ |
| A D | dram_sunxi_dw.c | 130 MBUS_CONF( SS, true, HIGHEST, 0, 256, 128, 64); in mctl_set_master_priority_h3()
155 MBUS_CONF( SS, true, HIGH, 0, 384, 256, 0); in mctl_set_master_priority_v3s()
178 MBUS_CONF( SS, true, HIGHEST, 0, 256, 128, 64); in mctl_set_master_priority_a64()
208 MBUS_CONF( SS, true, HIGHEST, 0, 256, 128, 64); in mctl_set_master_priority_h5()
236 MBUS_CONF( SS, true, HIGHEST, 0, 256, 128, 64); in mctl_set_master_priority_r40()
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| /arch/arm/dts/ |
| A D | imx6q-bosch-acc.dts | 443 connect-gpios = <&gpio1 16 GPIO_ACTIVE_HIGH>; /* Old: 0, SS: HIGH */
444 intn-gpios = <&gpio7 12 GPIO_ACTIVE_LOW>; /* Old: 1, SS: HIGH */
445 reset-gpios = <&gpio5 5 GPIO_ACTIVE_LOW>; /* Old: 0, SS: HIGH */
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| A D | exynos5420-peach-pit.dts | 106 * RCO SS setting
110 0x04 0xe2 0x80 /* [7] RCO SS enable */
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| A D | imx6qdl-aristainetos2c_cslb.dtsi | 179 /* spi bus #2 SS driver enable */
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| A D | imx6qdl-aristainetos2c.dtsi | 169 /* spi bus #2 SS driver enable */
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| A D | exynos5250-spring.dts | 597 /* RCO SS setting: [5:4] = b01 0.5%, b10 1%, b11 1.5% */
599 0x04 0xe2 0x80 /* [7] RCO SS enable */
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| A D | tegra124-apalis.dts | 1922 /* USBO1, USBO1 (SS), USBH2, USBH4 and USBH4 (SS) */
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Completed in 18 milliseconds