Searched refs:SYSCTL_BASE (Results 1 – 16 of 16) sorted by relevance
| /arch/mips/mach-mtmips/mt7620/ |
| A D | serial.c | 14 void __iomem *base = ioremap_nocache(SYSCTL_BASE, SYSCTL_SIZE); in board_debug_uart_init() 27 void __iomem *base = ioremap_nocache(SYSCTL_BASE, SYSCTL_SIZE); in mtmips_spl_serial_init()
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| A D | init.c | 30 void __iomem *sysc = ioremap_nocache(SYSCTL_BASE, SYSCTL_SIZE); in cpu_pll_init() 86 void __iomem *sysc = ioremap_nocache(SYSCTL_BASE, SYSCTL_SIZE); in mt7620_get_clks() 148 void __iomem *sysc = ioremap_nocache(SYSCTL_BASE, SYSCTL_SIZE); in print_cpuinfo() 189 void __iomem *sysc = ioremap_nocache(SYSCTL_BASE, SYSCTL_SIZE); in _machine_restart()
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| A D | dram.c | 59 void __iomem *sysc = ioremap_nocache(SYSCTL_BASE, SYSCTL_SIZE); in mt7620_memc_reset() 74 sysc = ioremap_nocache(SYSCTL_BASE, SYSCTL_SIZE); in mt7620_dram_init()
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| A D | mt7620.h | 13 #define SYSCTL_BASE 0x10000000 macro
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| /arch/mips/mach-mtmips/mt7628/ |
| A D | init.c | 23 sysc = ioremap_nocache(SYSCTL_BASE, SYSCTL_SIZE); in set_init_timer_freq() 56 sysc = ioremap_nocache(SYSCTL_BASE, SYSCTL_SIZE); in print_cpuinfo()
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| A D | serial.c | 14 void __iomem *base = ioremap_nocache(SYSCTL_BASE, SYSCTL_SIZE); in mtmips_spl_serial_init()
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| A D | ddr.c | 66 void __iomem *sysc = ioremap_nocache(SYSCTL_BASE, SYSCTL_SIZE); in mt7628_memc_reset() 136 sysc = ioremap_nocache(SYSCTL_BASE, SYSCTL_SIZE); in mt7628_ddr_init()
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| A D | lowlevel_init.S | 29 li t1, KSEG1ADDR(SYSCTL_BASE + SYSCTL_ROM_STATUS_REG) 30 li t2, KSEG1ADDR(SYSCTL_BASE + SYSCTL_CLKCFG0_REG)
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| A D | mt7628.h | 11 #define SYSCTL_BASE 0x10000000 macro
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| /arch/mips/mach-mtmips/mt7621/ |
| A D | serial.c | 14 void __iomem *base = ioremap_nocache(SYSCTL_BASE, SYSCTL_SIZE); in board_debug_uart_init()
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| A D | init.c | 30 void __iomem *sysc = ioremap_nocache(SYSCTL_BASE, SYSCTL_SIZE); in print_cpuinfo() 89 void __iomem *sysc = ioremap_nocache(SYSCTL_BASE, SYSCTL_SIZE); in get_xtal_mhz() 242 void __iomem *sysc = ioremap_nocache(SYSCTL_BASE, SYSCTL_SIZE); in _machine_restart()
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| A D | mt7621.h | 11 #define SYSCTL_BASE 0x1e000000 macro
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| /arch/mips/mach-mtmips/mt7621/spl/ |
| A D | serial.c | 14 void __iomem *base = ioremap_nocache(SYSCTL_BASE, SYSCTL_SIZE); in mtmips_spl_serial_init()
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| A D | start.S | 112 li t0, KSEG1ADDR(SYSCTL_BASE) 122 li t0, KSEG1ADDR(SYSCTL_BASE) 156 li t0, KSEG1ADDR(SYSCTL_BASE)
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| A D | launch.c | 58 void __iomem *sysc = (void __iomem *)KSEG1ADDR(SYSCTL_BASE); in secondary_cpu_init()
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| /arch/mips/mach-mtmips/mt7621/tpl/ |
| A D | start.S | 89 li t0, KSEG1ADDR(SYSCTL_BASE) 141 li t0, KSEG1ADDR(SYSCTL_BASE)
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