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Searched refs:SYSCTL_BASE (Results 1 – 16 of 16) sorted by relevance

/arch/mips/mach-mtmips/mt7620/
A Dserial.c14 void __iomem *base = ioremap_nocache(SYSCTL_BASE, SYSCTL_SIZE); in board_debug_uart_init()
27 void __iomem *base = ioremap_nocache(SYSCTL_BASE, SYSCTL_SIZE); in mtmips_spl_serial_init()
A Dinit.c30 void __iomem *sysc = ioremap_nocache(SYSCTL_BASE, SYSCTL_SIZE); in cpu_pll_init()
86 void __iomem *sysc = ioremap_nocache(SYSCTL_BASE, SYSCTL_SIZE); in mt7620_get_clks()
148 void __iomem *sysc = ioremap_nocache(SYSCTL_BASE, SYSCTL_SIZE); in print_cpuinfo()
189 void __iomem *sysc = ioremap_nocache(SYSCTL_BASE, SYSCTL_SIZE); in _machine_restart()
A Ddram.c59 void __iomem *sysc = ioremap_nocache(SYSCTL_BASE, SYSCTL_SIZE); in mt7620_memc_reset()
74 sysc = ioremap_nocache(SYSCTL_BASE, SYSCTL_SIZE); in mt7620_dram_init()
A Dmt7620.h13 #define SYSCTL_BASE 0x10000000 macro
/arch/mips/mach-mtmips/mt7628/
A Dinit.c23 sysc = ioremap_nocache(SYSCTL_BASE, SYSCTL_SIZE); in set_init_timer_freq()
56 sysc = ioremap_nocache(SYSCTL_BASE, SYSCTL_SIZE); in print_cpuinfo()
A Dserial.c14 void __iomem *base = ioremap_nocache(SYSCTL_BASE, SYSCTL_SIZE); in mtmips_spl_serial_init()
A Dddr.c66 void __iomem *sysc = ioremap_nocache(SYSCTL_BASE, SYSCTL_SIZE); in mt7628_memc_reset()
136 sysc = ioremap_nocache(SYSCTL_BASE, SYSCTL_SIZE); in mt7628_ddr_init()
A Dlowlevel_init.S29 li t1, KSEG1ADDR(SYSCTL_BASE + SYSCTL_ROM_STATUS_REG)
30 li t2, KSEG1ADDR(SYSCTL_BASE + SYSCTL_CLKCFG0_REG)
A Dmt7628.h11 #define SYSCTL_BASE 0x10000000 macro
/arch/mips/mach-mtmips/mt7621/
A Dserial.c14 void __iomem *base = ioremap_nocache(SYSCTL_BASE, SYSCTL_SIZE); in board_debug_uart_init()
A Dinit.c30 void __iomem *sysc = ioremap_nocache(SYSCTL_BASE, SYSCTL_SIZE); in print_cpuinfo()
89 void __iomem *sysc = ioremap_nocache(SYSCTL_BASE, SYSCTL_SIZE); in get_xtal_mhz()
242 void __iomem *sysc = ioremap_nocache(SYSCTL_BASE, SYSCTL_SIZE); in _machine_restart()
A Dmt7621.h11 #define SYSCTL_BASE 0x1e000000 macro
/arch/mips/mach-mtmips/mt7621/spl/
A Dserial.c14 void __iomem *base = ioremap_nocache(SYSCTL_BASE, SYSCTL_SIZE); in mtmips_spl_serial_init()
A Dstart.S112 li t0, KSEG1ADDR(SYSCTL_BASE)
122 li t0, KSEG1ADDR(SYSCTL_BASE)
156 li t0, KSEG1ADDR(SYSCTL_BASE)
A Dlaunch.c58 void __iomem *sysc = (void __iomem *)KSEG1ADDR(SYSCTL_BASE); in secondary_cpu_init()
/arch/mips/mach-mtmips/mt7621/tpl/
A Dstart.S89 li t0, KSEG1ADDR(SYSCTL_BASE)
141 li t0, KSEG1ADDR(SYSCTL_BASE)

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