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Searched refs:TSEG (Results 1 – 2 of 2) sorted by relevance

/arch/x86/cpu/apollolake/
A Dhostbridge.c40 TSEG = 0xb8, /* TSEG base */ enumerator
198 pci_x86_write_config(plat->bdf, TSEG, 0, PCI_SIZE_32); in apl_hostbridge_early_init()
366 return sa_read_reg(dev, TSEG); in sa_get_tseg_base()
/arch/x86/include/asm/arch-ivybridge/
A Dsandybridge.h84 #define TSEG 0xb8 /* TSEG base */ macro

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