Home
last modified time | relevance | path

Searched refs:_x (Results 1 – 5 of 5) sorted by relevance

/arch/arm/mach-s5pc1xx/include/mach/
A Dmmc.h23 #define SDHCI_CTRL2_FLTCLKSEL(_x) ((_x) << 24) argument
27 #define SDHCI_CTRL2_LVLDAT(_x) ((_x) << 16) argument
35 #define SDHCI_CTRL2_DFCNT_MASK(_x) ((_x) << 9) argument
41 #define SDHCI_CTRL2_SELBASECLK_MASK(_x) ((_x) << 4) argument
52 #define SDHCI_CTRL4_DRIVE_MASK(_x) ((_x) << 16) argument
/arch/arm/mach-exynos/include/mach/
A Dmmc.h23 #define SDHCI_CTRL2_FLTCLKSEL(_x) ((_x) << 24) argument
27 #define SDHCI_CTRL2_LVLDAT(_x) ((_x) << 16) argument
35 #define SDHCI_CTRL2_DFCNT_MASK(_x) ((_x) << 9) argument
41 #define SDHCI_CTRL2_SELBASECLK_MASK(_x) ((_x) << 4) argument
52 #define SDHCI_CTRL4_DRIVE_MASK(_x) ((_x) << 16) argument
A Dxhci-exynos.h13 #define LINKSYSTEM_FLADJ(_x) ((_x) << 1) argument
21 #define PHYCLKRST_SSC_REFCLKSEL(_x) ((_x) << 23) argument
24 #define PHYCLKRST_SSC_RANGE(_x) ((_x) << 21) argument
38 #define PHYCLKRST_FSEL(_x) ((_x) << 5) argument
/arch/arm/mach-orion5x/include/mach/
A Dcpu.h21 #define ORION5XGBE_PORT_SERIAL_CONTROL1_REG(_x) \ argument
22 ((_x ? ORION5X_EGIGA0_BASE : ORION5X_EGIGA1_BASE) + 0x44c)
/arch/arm/mach-kirkwood/include/mach/
A Dcpu.h18 #define KWGBE_PORT_SERIAL_CONTROL1_REG(_x) \ argument
19 ((_x ? KW_EGIGA1_BASE : KW_EGIGA0_BASE) + 0x44c)

Completed in 8 milliseconds