| /arch/mips/mach-octeon/include/mach/ |
| A D | cvmx-bootmem.h | 134 void *cvmx_bootmem_alloc(u64 size, u64 alignment);
147 void *cvmx_bootmem_alloc_node(u64 node, u64 size, u64 alignment);
163 u64 alignment);
178 void *cvmx_bootmem_alloc_range(u64 size, u64 alignment,
193 void *cvmx_bootmem_alloc_named(u64 size, u64 alignment,
209 void *cvmx_bootmem_alloc_named_flags(u64 size, u64 alignment,
357 u64 alignment, u32 flags);
386 u64 alignment, const char *name,
531 u64 cvmx_bootmem_phy_alloc_range(u64 size, u64 alignment,
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| A D | cvmx-global-resources.h | 123 int alignment);
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| /arch/arm/lib/ |
| A D | asmdefs.h | 50 #define ENTRY_ALIGN(name, alignment) \ argument
53 .align alignment; \
62 #define ENTRY_ALIGN(name, alignment) \
65 .align alignment; \
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| /arch/mips/mach-octeon/ |
| A D | cvmx-bootmem.c | 392 alignment, 0); in cvmx_bootmem_phy_alloc_range()
406 alignment, 0); in cvmx_bootmem_alloc_range()
415 u64 alignment) in cvmx_bootmem_alloc_address() argument
423 return cvmx_bootmem_alloc_range(size, alignment, in cvmx_bootmem_alloc_node()
428 void *cvmx_bootmem_alloc(u64 size, u64 alignment) in cvmx_bootmem_alloc() argument
585 u64 address_max, u64 alignment, in cvmx_bootmem_phy_alloc() argument
599 CAST_ULL(address_max), CAST_ULL(alignment)); in cvmx_bootmem_phy_alloc()
624 if (align >= alignment) in cvmx_bootmem_phy_alloc()
1030 u64 alignment, const char *name, in cvmx_bootmem_phy_named_block_alloc() argument
1038 CAST_ULL(alignment), name); in cvmx_bootmem_phy_named_block_alloc()
[all …]
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| A D | cvmx-global-resources.c | 409 u64 owner, int nelements, int alignment) in cvmx_allocate_global_resource_range() argument
423 base = cvmx_range_alloc(addr, owner, nelements, alignment); in cvmx_allocate_global_resource_range()
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| /arch/x86/cpu/apollolake/ |
| A D | lpc.c | 50 u32 lgir_reg_offset, lgir, window_size, alignment; in lpc_open_pmio_window() local
65 alignment = 1UL << (order_base_2(window_size)); in lpc_open_pmio_window()
66 window_size = ALIGN(window_size, alignment); in lpc_open_pmio_window()
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| /arch/x86/cpu/ |
| A D | u-boot-spl.lds | 52 * Force 32-byte alignment so that it lines up with the start of
53 * bss, which may have up to 32-byte alignment. This ensures
56 * The alignment of BSS depends on what is in it, so can range
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| /arch/mips/cpu/ |
| A D | start.S | 44 and sp, t1, t0 # force 16 byte alignment
47 and sp, sp, t0 # force 16 byte alignment
54 and sp, sp, t0 # force 16 byte alignment
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| /arch/mips/mach-mtmips/mt7621/spl/ |
| A D | start.S | 35 and sp, t1, t0 # force 16 byte alignment
38 and sp, sp, t0 # force 16 byte alignment
45 and sp, sp, t0 # force 16 byte alignment
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| /arch/mips/mach-mtmips/mt7620/ |
| A D | lowlevel_init.S | 30 and sp, sp, t0 # force 16 byte alignment
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| /arch/powerpc/dts/ |
| A D | kmcent2.dts | 28 alignment = <0 0x1000000>;
32 alignment = <0 0x400000>;
36 alignment = <0 0x2000000>;
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| /arch/sandbox/dts/ |
| A D | sandbox.dts | 38 alignment = <0x2000>;
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| A D | sandbox64.dts | 34 alignment = <0 0x2000>;
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| /arch/arm/mach-bcm283x/ |
| A D | msg.c | 188 msg_setup->allocate_buffer.body.req.alignment = 0x100; in bcm2835_set_video_params()
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| /arch/arm/mach-bcm283x/include/mach/ |
| A D | mbox.h | 276 u32 alignment; member
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| /arch/arm/dts/ |
| A D | socfpga_agilex5.dtsi | 25 alignment = <0x1000>;
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| A D | ast2600.dtsi | 79 alignment = <0x01000000>;
86 alignment = <0x01000000>;
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| A D | ast2600-sbp1.dts | 31 alignment = <0x01000000>;
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