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Searched refs:apll_sdiv (Results 1 – 2 of 2) sorted by relevance

/arch/arm/mach-exynos/
A Dclock_init.h25 unsigned apll_sdiv; member
46 unsigned apll_sdiv; member
A Dclock_init_exynos5.c29 .apll_sdiv = 0x1,
46 .apll_sdiv = 0x1,
61 .apll_sdiv = 0x0,
76 .apll_sdiv = 0x0,
91 .apll_sdiv = 0x0,
106 .apll_sdiv = 0x0,
121 .apll_sdiv = 0x0,
619 arm_clk_ratio->apll_sdiv); in exynos5250_system_clock_init()
821 arm_clk_ratio->apll_sdiv); in exynos5420_system_clock_init()

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