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Searched refs:base_addr (Results 1 – 25 of 31) sorted by relevance

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/arch/arm/include/asm/mach-imx/
A Dmodule_fuse.h93 static inline u32 uart_fused(ulong base_addr) in uart_fused() argument
98 static inline u32 usb_fused(ulong base_addr) in usb_fused() argument
103 static inline u32 qspi_fused(ulong base_addr) in qspi_fused() argument
108 static inline u32 i2c_fused(ulong base_addr) in i2c_fused() argument
119 u32 esdhc_fused(ulong base_addr);
120 u32 ecspi_fused(ulong base_addr);
121 u32 uart_fused(ulong base_addr);
122 u32 usb_fused(ulong base_addr);
123 u32 qspi_fused(ulong base_addr);
124 u32 i2c_fused(ulong base_addr);
[all …]
/arch/arm/mach-imx/mx6/
A Dmodule_fuse.c227 u32 esdhc_fused(ulong base_addr) in esdhc_fused() argument
229 switch (base_addr) { in esdhc_fused()
247 u32 ecspi_fused(ulong base_addr) in ecspi_fused() argument
249 switch (base_addr) { in ecspi_fused()
267 u32 usb_fused(ulong base_addr) in usb_fused() argument
274 u32 qspi_fused(ulong base_addr) in qspi_fused() argument
276 switch (base_addr) { in qspi_fused()
291 u32 i2c_fused(ulong base_addr) in i2c_fused() argument
293 switch (base_addr) { in i2c_fused()
309 u32 enet_fused(ulong base_addr) in enet_fused() argument
[all …]
A Dclock.c677 void mxs_set_lcdclk(u32 base_addr, u32 freq) in mxs_set_lcdclk() argument
697 if (base_addr == LCDIF1_BASE_ADDR) { in mxs_set_lcdclk()
769 if (base_addr == LCDIF1_BASE_ADDR) { in mxs_set_lcdclk()
773 enable_lcdif_clock(base_addr, 0); in mxs_set_lcdclk()
804 enable_lcdif_clock(base_addr, 1); in mxs_set_lcdclk()
811 enable_lcdif_clock(base_addr, 0); in mxs_set_lcdclk()
826 enable_lcdif_clock(base_addr, 1); in mxs_set_lcdclk()
837 if ((base_addr != LCDIF1_BASE_ADDR) && in enable_lcdif_clock()
838 (base_addr != LCDIF2_BASE_ADDR)) { in enable_lcdif_clock()
852 if (base_addr != LCDIF1_BASE_ADDR) { in enable_lcdif_clock()
[all …]
/arch/x86/lib/
A Dmrccache.c52 ulong base_addr, end_addr; in mrccache_find_current() local
55 base_addr = entry->base + entry->offset; in mrccache_find_current()
56 end_addr = base_addr + entry->length; in mrccache_find_current()
60 for (id = 0, next = (struct mrc_data_container *)base_addr; in mrccache_find_current()
103 ulong base_addr, end_addr; in find_next_mrc_cache() local
105 base_addr = entry->base + entry->offset; in find_next_mrc_cache()
106 end_addr = base_addr + entry->length; in find_next_mrc_cache()
142 ulong base_addr; in mrccache_update() local
151 base_addr = entry->base + entry->offset; in mrccache_update()
177 cache = (struct mrc_data_container *)base_addr; in mrccache_update()
[all …]
A Dzimage.c627 ulong initrd_size, ulong base_addr, const char *cmdline) in zboot_start() argument
634 if (base_addr) { in zboot_start()
635 state.base_ptr = map_sysmem(base_addr, 0); in zboot_start()
/arch/arm/mach-socfpga/
A Dpinmux_arria10.c15 fdt_addr_t base_addr; in do_pinctr_pin() local
20 base_addr = fdtdec_get_addr_size(blob, child, "reg", &size); in do_pinctr_pin()
21 if (base_addr != FDT_ADDR_T_NONE) { in do_pinctr_pin()
31 writel(value, base_addr + offset); in do_pinctr_pin()
/arch/powerpc/cpu/mpc8xxx/
A Dfsl_pamu.c234 u32 base_addr = CFG_SYS_PAMU_ADDR; in pamu_init() local
271 regs = (struct ccsr_pamu *)base_addr; in pamu_init()
287 base_addr += PAMU_OFFSET; in pamu_init()
296 u32 base_addr = CFG_SYS_PAMU_ADDR; in pamu_enable() local
298 setbits_be32((void *)base_addr + PAMU_PCR_OFFSET, in pamu_enable()
301 base_addr += PAMU_OFFSET; in pamu_enable()
308 u32 base_addr = CFG_SYS_PAMU_ADDR; in pamu_reset() local
312 regs = (struct ccsr_pamu *)base_addr; in pamu_reset()
325 base_addr += PAMU_OFFSET; in pamu_reset()
332 u32 base_addr = CFG_SYS_PAMU_ADDR; in pamu_disable() local
[all …]
/arch/x86/cpu/tangier/
A Dpinmux.c84 mrfld_setup_families(void *base_addr, in mrfld_setup_families() argument
90 family->regs = base_addr + in mrfld_setup_families()
186 void *base_addr = syscon_get_first_range(X86_SYSCON_PINCONF); in tangier_pinctrl_probe() local
191 mrfld_setup_families(base_addr, mrfld_families, in tangier_pinctrl_probe()
/arch/arm/include/asm/arch-mx6/
A Dclock.h81 int enable_lcdif_clock(u32 base_addr, bool enable);
84 void mxs_set_lcdclk(u32 base_addr, u32 freq);
/arch/arm/mach-at91/include/mach/
A Datmel_serial.h11 uint32_t base_addr; member
A Dgpio.h257 uint32_t base_addr; member
/arch/x86/include/asm/
A Dgpio.h12 uint16_t base_addr; member
A Dzimage.h153 ulong initrd_size, ulong base_addr, const char *cmdline);
/arch/arm/mach-mvebu/serdes/a38x/
A Dhigh_speed_env_spec-38x.c108 int hws_get_ext_base_addr(u32 serdes_num, u32 base_addr, u32 unit_base_offset, in hws_get_ext_base_addr() argument
111 *unit_base_reg = base_addr; in hws_get_ext_base_addr()
A Dhigh_speed_env_spec.h244 int hws_get_ext_base_addr(u32 serdes_num, u32 base_addr, u32 unit_base_offset,
/arch/arm/include/asm/arch-imx8ulp/
A Dclock.h47 void mxs_set_lcdclk(u32 base_addr, u32 freq_in_khz);
/arch/mips/mach-octeon/
A Dcvmx-bootmem.c451 base_addr); in cvmx_bootmem_alloc_named_range_once()
541 desc.base_addr = CVMX_BOOTMEM_NAMED_GET_FIELD(named_addr, in __cvmx_bootmem_find_named_block_flags()
542 base_addr); in __cvmx_bootmem_find_named_block_flags()
1009 base_addr); in cvmx_bootmem_phy_named_block_free()
1079 CVMX_BOOTMEM_NAMED_SET_FIELD(named_block_desc_addr, base_addr, in cvmx_bootmem_phy_named_block_alloc()
1115 base_addr); in cvmx_bootmem_phy_named_block_print()
1221 CVMX_BOOTMEM_NAMED_SET_FIELD(addr, base_addr, 0); in cvmx_bootmem_phy_mem_list_init()
1347 CVMX_BOOTMEM_NAMED_SET_FIELD(addr, base_addr, 0); in cvmx_bootmem_phy_mem_list_init_multi()
A Dcvmx-cmd-queue.c97 block_desc->base_addr); in __cvmx_cmd_queue_init_state_ptr()
/arch/x86/include/asm/arch-broadwell/
A Dgpio.h15 uint16_t base_addr; member
/arch/arm/include/asm/
A Domap_mmc.h72 struct hsmmc *base_addr; member
/arch/mips/mach-octeon/include/mach/
A Dcvmx-bootmem.h73 u64 base_addr; /* Base address of named block */ member
/arch/arm/include/asm/ti-common/
A Dkeystone_nav.h41 u32 base_addr; member
/arch/arm/include/asm/arch-aspeed/
A Dscu_ast2500.h193 u32 base_addr[9]; member
/arch/arm/include/asm/arch-mx7/
A Dclock.h362 void mxs_set_lcdclk(uint32_t base_addr, uint32_t freq);
/arch/arm/include/asm/arch-imx8m/
A Dclock.h274 void mxs_set_lcdclk(u32 base_addr, u32 freq);

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