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/arch/mips/
A Dconfig.mk7 32bit-emul := elf32btsmip
8 64bit-emul := elf64btsmip
9 32bit-bfd := elf32-tradbigmips
10 64bit-bfd := elf64-tradbigmips
16 32bit-emul := elf32ltsmip
17 64bit-emul := elf64ltsmip
18 32bit-bfd := elf32-tradlittlemips
19 64bit-bfd := elf64-tradlittlemips
27 OBJCOPYFLAGS += -O $(32bit-bfd)
32 KBUILD_LDFLAGS += -m$(64bit-emul)
[all …]
/arch/arm/dts/
A Domap3xxx-clocks.dtsi25 ti,bit-shift = <6>;
36 ti,bit-shift = <7>;
85 ti,bit-shift = <4>;
99 ti,bit-shift = <2>;
113 ti,bit-shift = <6>;
140 ti,bit-shift = <2>;
245 ti,bit-shift = <16>;
352 ti,bit-shift = <6>;
360 ti,bit-shift = <8>;
387 ti,bit-shift = <5>;
[all …]
A Dcn9130-db-dev-info.dtsi20 start-bit = <0>;
21 bit-length = <4>;
32 start-bit = <4>;
33 bit-length = <6>;
35 options = "0xE", "CP0_NAND PIDI BW-8bit, PS-4KB, ECC-4bit\t(supported configuration: B)",
36 "0xF", "CP0_NAND PIDI BW-8bit, PS-4KB, ECC-8bit\t(supported configuration: B)",
A Domap36xx-clocks.dtsi19 ti,bit-shift = <0x1e>;
22 ti,set-bit-to-disable;
29 ti,bit-shift = <0x1b>;
31 ti,set-bit-to-disable;
38 ti,bit-shift = <0xc>;
40 ti,set-bit-to-disable;
47 ti,bit-shift = <0x1c>;
49 ti,set-bit-to-disable;
56 ti,bit-shift = <0x1f>;
58 ti,set-bit-to-disable;
[all …]
A Domap34xx-omap36xx-clocks.dtsi20 ti,bit-shift = <3>;
29 ti,bit-shift = <2>;
37 ti,bit-shift = <1>;
45 ti,bit-shift = <0>;
52 ti,bit-shift = <0>;
62 ti,bit-shift = <0>;
70 ti,bit-shift = <1>;
86 ti,bit-shift = <4>;
118 ti,bit-shift = <7>;
134 ti,bit-shift = <6>;
[all …]
A Ddra7xx-clocks.dtsi255 ti,bit-shift = <23>;
329 ti,bit-shift = <23>;
367 ti,bit-shift = <23>;
405 ti,bit-shift = <23>;
454 ti,bit-shift = <23>;
480 ti,bit-shift = <23>;
554 ti,bit-shift = <23>;
753 ti,bit-shift = <4>;
1193 ti,bit-shift = <8>;
1245 ti,bit-shift = <7>;
[all …]
A Domap36xx-am35xx-omap3430es2plus-clocks.dtsi47 ti,bit-shift = <1>;
109 ti,bit-shift = <0>;
117 ti,bit-shift = <0>;
125 ti,bit-shift = <1>;
133 ti,bit-shift = <2>;
141 ti,bit-shift = <2>;
164 ti,bit-shift = <0>;
174 ti,bit-shift = <0>;
182 ti,bit-shift = <1>;
190 ti,bit-shift = <0>;
[all …]
A Dam43xx-clocks.dtsi12 ti,bit-shift = <31>;
20 ti,bit-shift = <29>;
28 ti,bit-shift = <22>;
108 ti,bit-shift = <0>;
116 ti,bit-shift = <1>;
124 ti,bit-shift = <2>;
132 ti,bit-shift = <4>;
140 ti,bit-shift = <5>;
148 ti,bit-shift = <6>;
350 ti,bit-shift = <8>;
[all …]
A Domap36xx-omap3430es2plus-clocks.dtsi12 ti,bit-shift = <0>;
20 ti,bit-shift = <8>;
44 ti,bit-shift = <4>;
60 ti,bit-shift = <0>;
67 ti,bit-shift = <9>;
147 ti,bit-shift = <3>;
163 ti,bit-shift = <9>;
/arch/arm/include/asm/xen/
A Dsystem.h25 u8 bit = 1 << (nr & 7); in synch_test_and_clear_bit() local
28 orig = __atomic_fetch_and(byte, ~bit, __ATOMIC_SEQ_CST); in synch_test_and_clear_bit()
30 return (orig & bit) != 0; in synch_test_and_clear_bit()
37 u8 bit = 1 << (nr & 7); in synch_test_and_set_bit() local
40 orig = __atomic_fetch_or(byte, bit, __ATOMIC_SEQ_CST); in synch_test_and_set_bit()
42 return (orig & bit) != 0; in synch_test_and_set_bit()
/arch/arm/cpu/armv8/fsl-layerscape/doc/
A DREADME.core_prefetch7 Here 0x02 can be replaced with any valid value except Mask[0] bit. It
8 represents 64 bit mask. The 64-bit Mask has one bit for each core.
13 If the bit is set ('b1) in the mask, then prefetch is disabled for
A DREADME.soc22 - Four 64-bit ARM Cortex-A53 CPUs
64 - 8 32-bit / 64-bit ARM v8 Cortex-A53 CPUs
93 - Eight 64-bit ARM Cortex-A57 CPUs
139 16-/8-bit operation (no ECC support)
178 - Four 64-bit ARM Cortex-A72 CPUs
220 - Eight 64-bit ARM Cortex-A72 CPUs
257 a) Four 64-bit ARM v8 Cortex-A72 CPUs
261 b) No 32-bit DDR3 SDRAM memory
289 Sixteen 32-bit / 64-bit ARM v8 A72 CPUs
349 - Two 64-bit ARM v8 A72 CPUs
[all …]
/arch/arm/mach-mvebu/
A Dsystem-controller.c112 uint bit; in mvebu_sysreset_request() local
117 bit = MVEBU_GLOBAL_SOFT_RST_BIT; in mvebu_sysreset_request()
119 regmap_update_bits(regmap, MVEBU_RSTOUTN_MASK_REG, bit, bit); in mvebu_sysreset_request()
120 regmap_update_bits(regmap, MVEBU_SYS_SOFT_RST_REG, bit, bit); in mvebu_sysreset_request()
/arch/powerpc/dts/
A Dp1010si-post.dtsi42 fsl,rx-bit-map = <0xff>;
43 fsl,tx-bit-map = <0xff>;
50 fsl,rx-bit-map = <0xff>;
51 fsl,tx-bit-map = <0xff>;
58 fsl,rx-bit-map = <0xff>;
59 fsl,tx-bit-map = <0xff>;
/arch/riscv/
A Dconfig.mk23 32bit-emul := elf32$(small-endian)riscv
24 64bit-emul := elf64$(small-endian)riscv
27 KBUILD_LDFLAGS += -m $(32bit-emul)
33 KBUILD_LDFLAGS += -m $(64bit-emul)
/arch/arm/mach-bcm283x/
A DKconfig17 bool "Broadcom BCM2837 SoC 32-bit support"
24 bool "Broadcom BCM2837 SoC 64-bit support"
40 bool "Broadcom BCM2711 SoC 32-bit support"
48 bool "Broadcom BCM2711 SoC 64-bit support"
116 bool "Raspberry Pi 3 32-bit build"
119 the RPi 3 model B, in AArch32 (32-bit) mode.
132 bool "Raspberry Pi 3 64-bit build"
135 the RPi 3 model B, in AArch64 (64-bit) mode.
160 bool "Raspberry Pi 4 32-bit build"
179 bool "Raspberry Pi 4 64-bit build"
[all …]
/arch/x86/include/asm/acpi/
A Dirqlinks.asl52 /* Set the bit from PRTA */
63 /* Which bit is set? */
110 /* Set the bit from PRTB */
121 /* Which bit is set? */
168 /* Set the bit from PRTC */
179 /* Which bit is set? */
237 /* Which bit is set? */
295 /* Which bit is set? */
353 /* Which bit is set? */
411 /* Which bit is set? */
[all …]
/arch/arm/mach-nexell/
A Dnx_gpio.c30 void nx_gpio_set_bit(u32 *value, u32 bit, int enable) in nx_gpio_set_bit() argument
35 newvalue &= ~(1ul << bit); in nx_gpio_set_bit()
36 newvalue |= (u32)enable << bit; in nx_gpio_set_bit()
40 int nx_gpio_get_bit(u32 value, u32 bit) in nx_gpio_get_bit() argument
42 return (int)((value >> bit) & (1ul)); in nx_gpio_get_bit()
45 void nx_gpio_set_bit2(u32 *value, u32 bit, u32 bit_value) in nx_gpio_set_bit2() argument
49 newvalue = (u32)(newvalue & ~(3ul << (bit * 2))); in nx_gpio_set_bit2()
50 newvalue = (u32)(newvalue | (bit_value << (bit * 2))); in nx_gpio_set_bit2()
55 u32 nx_gpio_get_bit2(u32 value, u32 bit) in nx_gpio_get_bit2() argument
57 return (u32)((u32)(value >> (bit * 2)) & 3ul); in nx_gpio_get_bit2()
/arch/arm/mach-renesas/
A DKconfig3 # Renesas ARM SoCs R-Car Gen3/Gen4 (64bit)
25 bool "Renesas ARM SoCs R-Car Gen1/Gen2 (32bit)"
29 bool "Renesas ARM SoCs R-Car Gen3 (64bit)"
45 bool "Renesas ARM SoCs R-Car Gen4 (64bit)"
50 prompt "Renesas ARM SoCs RZ/A1 (32bit)"
54 prompt "Renesas ARM SoCs RZ/N1 (32bit)"
/arch/arm/cpu/armv7/
A Dstart.S232 orr r0, r0, #0x00000800 @ set bit 11 (Z---) BTB
242 orr r0, r0, #1 << 11 @ set bit #11
248 orr r0, r0, #1 << 4 @ set bit #4
254 orr r0, r0, #1 << 6 @ set bit #6
260 orr r0, r0, #1 << 11 @ set bit #11
265 orr r0, r0, #1 << 21 @ set bit #21
271 orr r0, r0, #1 << 22 @ set bit #22
354 orrlt r0, r0, #(0x1 << 6) @ Set IBE bit
365 orrlt r0, r0, #(0x1 << 5) @ Set L1NEON bit
385 orr r0, r0, #1 << 24 @ set bit #24
[all …]
/arch/arc/lib/
A Dlibgcc2.c81 unsigned long bit = 1; in udivmodsi4() local
84 while (den < num && bit && !(den & (1L<<31))) { in udivmodsi4()
86 bit <<= 1; in udivmodsi4()
89 while (bit) { in udivmodsi4()
92 res |= bit; in udivmodsi4()
94 bit >>= 1; in udivmodsi4()
/arch/arm/mach-lpc32xx/
A Dtimer.c18 static void lpc32xx_timer_clock(u32 bit, int enable) in lpc32xx_timer_clock() argument
21 setbits_le32(&clk->timclk_ctrl1, bit); in lpc32xx_timer_clock()
23 clrbits_le32(&clk->timclk_ctrl1, bit); in lpc32xx_timer_clock()
/arch/arm/lib/
A Ddiv64.S57 @ See if we need to handle upper 32-bit result.
64 @ The bit position is stored in ip.
87 @ The division loop for needed upper bit positions.
96 @ See if we need to handle lower 32-bit result.
103 @ The division loop for lower bit positions.
105 @ divisor for comparisons, considering the carry-out bit as well.
118 @ (the 33th bit) this is a false positive so resume the loop.
144 @ If no bit position left then we are done.
/arch/x86/include/asm/
A Dbitops.h299 int set = 0, bit = offset & 31, res; in find_next_zero_bit() local
301 if (bit) { in find_next_zero_bit()
310 : "r" (~(*p >> bit))); in find_next_zero_bit()
311 if (set < (32 - bit)) in find_next_zero_bit()
313 set = 32 - bit; in find_next_zero_bit()
/arch/arm/mach-mvebu/serdes/a38x/
A Dhigh_speed_env_spec.h15 #define SET_BIT(data, bit) ((data) | (0x1 << (bit))) argument
16 #define CLEAR_BIT(data, bit) ((data) & (~(0x1 << (bit)))) argument

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