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/arch/x86/cpu/quark/
A Dsmc.c1358 for (bl = 0; bl < NUM_BYTE_LANES; bl++) { in restore_timings()
1386 for (bl = 0; bl < NUM_BYTE_LANES; bl++) { in default_timings()
1458 for (bl = 0; bl < (NUM_BYTE_LANES / bl_divisor); bl++) in rcvn_cal()
1470 for (bl = 0; bl < (NUM_BYTE_LANES / bl_divisor); bl++) { in rcvn_cal()
1481 for (bl = 0; bl < (NUM_BYTE_LANES / bl_divisor); bl++) { in rcvn_cal()
1506 for (bl = 0; bl < (NUM_BYTE_LANES / bl_divisor); bl++) { in rcvn_cal()
1515 for (bl = 0; bl < (NUM_BYTE_LANES / bl_divisor); bl++) { in rcvn_cal()
1721 for (bl = 0; bl < NUM_BYTE_LANES / bl_divisor; bl++) { in wr_level()
1736 for (bl = 0; bl < NUM_BYTE_LANES / bl_divisor; bl++) { in wr_level()
2242 for (bl = 0; bl < NUM_BYTE_LANES / bl_divisor; bl++) { in wr_train()
[all …]
A Dmrc_util.c1066 for (bl = 0; bl < 2; bl++) { in sample_dqs()
1112 for (bl = 0; bl < (NUM_BYTE_LANES / bl_divisor); bl++) { in find_rising_edge()
1137 for (bl = 0; bl < NUM_BYTE_LANES / bl_divisor; bl++) { in find_rising_edge()
1188 set_rcvn(channel, rank, bl, delay[bl]); in find_rising_edge()
1202 for (bl = 0; bl < NUM_BYTE_LANES / bl_divisor; bl++) { in find_rising_edge()
1214 bl, delay[bl]); in find_rising_edge()
1217 bl, delay[bl]); in find_rising_edge()
1231 bl, delay[bl]); in find_rising_edge()
1234 bl, delay[bl]); in find_rising_edge()
1360 for (bl = 0; bl < NUM_BYTE_LANES; bl++) { in clear_pointers()
[all …]
/arch/arm/cpu/armv8/fsl-layerscape/
A Dlowlevel.S66 bl get_gic_offset
86 bl ccn504_set_aux
94 bl get_svr
102 bl ccn504_set_aux
105 bl ccn504_set_aux
118 bl ccn504_set_qos
121 bl ccn504_set_qos
124 bl ccn504_set_qos
128 bl ccn504_set_qos
131 bl ccn504_set_qos
[all …]
/arch/arm/cpu/armv8/
A Dexceptions.S40 bl _exception_entry
41 bl do_bad_sync
67 bl _exception_entry
68 bl do_bad_irq
97 bl _exception_entry
98 bl do_bad_fiq
117 bl do_bad_error
146 bl do_sync
152 bl do_irq
158 bl do_fiq
[all …]
A Dstart.S165 bl apply_core_errata
175 bl lowlevel_init
208 bl _main
307 bl gic_init_secure
311 bl gic_init_secure_percpu
315 bl gic_init_secure_percpu
331 bl gic_wait_for_interrupt
338 bl psci_setup_vectors
342 bl armv8_switch_to_el2
348 bl armv8_switch_to_el1
A Dtransition.S20 bl armv8_switch_to_el2_prep
30 bl armv8_el2_to_aarch32
/arch/arm/lib/
A Dcrt0.S76 bl memset
96 bl arch_very_early_init
110 bl board_init_f_alloc_reserve
114 bl board_init_f_init_reserve
117 bl debug_uart_init
125 bl board_init_f
166 bl relocate_vectors
170 bl c_runtime_cpu_setup /* we still call old routine here */
180 bl spl_relocate_stack_gd
187 bl coloured_LED_init
[all …]
A Dcrt0_64.S87 bl board_init_f_alloc_reserve
91 bl board_init_f_init_reserve
94 bl debug_uart_init
98 bl board_init_f
139 bl c_runtime_cpu_setup /* still call old routine */
143 bl spl_relocate_stack_gd /* may return NULL */
A Drelocate_64.S81 bl hang
92 bl __asm_flush_dcache_range
93 bl __asm_flush_l3_dcache
/arch/arm/mach-renesas/
A Dlowlevel_init_gen3.S48 bl gic_init_secure
55 bl gic_init_secure
59 bl gic_init_secure_percpu
63 bl gic_init_secure_percpu
78 bl gic_wait_for_interrupt
86 bl armv8_switch_to_el2
92 bl armv8_switch_to_el1
98 bl s_init
/arch/arm/mach-socfpga/
A Dlowlevel_init_soc64.S123 bl gic_init_secure
127 bl gic_init_secure_percpu
131 bl gic_init_secure_percpu
147 bl gic_wait_for_interrupt
155 bl armv8_switch_to_el2
161 bl armv8_switch_to_el1
/arch/arm/cpu/arm720t/
A Dstart.S42 bl cpu_init_crit
45 bl _main
75 bl lowlevel_init
/arch/powerpc/lib/
A Dticks.S38 bl get_ticks /* Get start time */
45 bl schedule /* Trigger watchdog, if needed */
47 1: bl get_ticks /* Get current time */
/arch/arm/cpu/arm946es/
A Dstart.S49 bl cpu_init_crit
52 bl _main
97 bl lowlevel_init /* go setup memory */
/arch/arm/cpu/armv8/bcmns3/
A Dlowlevel.S70 bl hnf_set_pstate
73 bl hnf_pstate_poll
79 bl hnf_set_pstate
82 bl hnf_pstate_poll
/arch/arm/cpu/arm1136/
A Dstart.S43 bl cpu_init_crit
46 bl _main
90 bl lowlevel_init /* go setup pll,mux,memory */
/arch/arm/cpu/arm920t/
A Dstart.S42 bl cpu_init_crit
45 bl _main
93 bl lowlevel_init
/arch/arm/cpu/arm926ejs/
A Dstart.S55 bl cpu_init_crit
58 bl _main
113 bl lowlevel_init /* go setup pll,mux,memory */
/arch/arm/cpu/armv7/
A Dpsci.S238 bl psci_v7_flush_dcache_all
248 bl psci_v7_flush_dcache_all
252 bl psci_disable_smp
289 bl psci_get_cpu_id @ CPU ID => r0
305 bl psci_enable_smp
307 bl _nonsec_init
309 bl psci_stack_setup
311 bl psci_arch_cpu_entry
313 bl psci_get_cpu_id @ CPU ID => r0
316 bl psci_get_cpu_id @ CPU ID => r0
[all …]
/arch/arm/dts/
A Dimx6ull-kontron-bl.dts10 #include "imx6ul-kontron-bl-common.dtsi"
14 compatible = "kontron,bl-imx6ull", "kontron,sl-imx6ull", "fsl,imx6ull";
A Dimx6ul-kontron-bl.dts11 #include "imx6ul-kontron-bl-common.dtsi"
15 compatible = "kontron,bl-imx6ul", "kontron,sl-imx6ul", "fsl,imx6ul";
A Dimx6ul-kontron-bl-43.dts8 #include "imx6ul-kontron-bl.dts"
12 compatible = "kontron,bl-imx6ul-43", "kontron,bl-imx6ul",
/arch/arm/mach-tegra/
A Dpsci.S52 bl psci_get_cpu_id @ CPU ID => r0
70 bl psci_cpu_off_common
72 bl psci_get_cpu_id @ CPU ID => r0
93 bl psci_save @ store target PC and context id
/arch/arm/mach-uniphier/arm32/
A Dlowlevel_init.S28 bl debug_ll_init
31 bl setup_init_ram @ RAM area for stack and page table
38 bl create_page_table
39 bl __v7_flush_dcache_all
46 bl enable_mmu
/arch/powerpc/cpu/mpc8xx/
A Dstart.S153 bl board_init_f_alloc_reserve
164 bl board_init_f_init_reserve
174 bl cpu_init_f /* run low-level CPU init code (from Flash) */
177 bl board_init_f /* run 1st part of board init code (from Flash) */
480 bl board_init_r
513 bl trap_reloc
519 bl trap_reloc
522 bl trap_reloc
527 bl trap_reloc
535 bl trap_reloc

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