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Searched refs:bpll_con1 (Results 1 – 3 of 3) sorted by relevance

/arch/arm/mach-exynos/
A Ddmc_init_ddr3.c479 setbits_le32(&clk->bpll_con1, BYPASS_EN); in ddr3_mem_ctrl_init()
487 clrbits_le32(&clk->bpll_con1, BYPASS_EN); in ddr3_mem_ctrl_init()
A Dclock_init_exynos5.c632 writel(BPLL_CON1_VAL, &clk->bpll_con1); in exynos5250_system_clock_init()
889 writel(BPLL_CON1_VAL, &clk->bpll_con1); in exynos5420_system_clock_init()
/arch/arm/mach-exynos/include/mach/
A Dclock.h833 unsigned int bpll_con1; member
1243 unsigned int bpll_con1; member

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