Searched refs:bw (Results 1 – 13 of 13) sorted by relevance
| /arch/mips/mach-mtmips/ |
| A D | ddr_init.c | 88 if (bw) { in mc_ddr_init() 104 u32 bw = 0; in ddr1_init() local 113 bw = IND_SDRAM_WIDTH_16BIT; in ddr1_init() 115 bw = IND_SDRAM_WIDTH_8BIT; in ddr1_init() 119 param->dqs_dly, param->mc_reset, bw); in ddr1_init() 143 param->bus_width = bw; in ddr1_init() 149 u32 bw = 0; in ddr2_init() local 158 bw = IND_SDRAM_WIDTH_16BIT; in ddr2_init() 160 bw = IND_SDRAM_WIDTH_8BIT; in ddr2_init() 166 if (bw == IND_SDRAM_WIDTH_16BIT) { in ddr2_init() [all …]
|
| A D | ddr_cal.c | 104 void ddr_calibrate(void __iomem *memc, u32 memsize, u32 bw) in ddr_calibrate() argument 120 if (bw == IND_SDRAM_WIDTH_16BIT) in ddr_calibrate() 144 for (i = 0; i < bw; i++) { in ddr_calibrate()
|
| /arch/arm/cpu/armv7/s5p-common/ |
| A D | sromc.c | 25 tmp = srom->bw; in s5p_config_sromc() 28 srom->bw = tmp; in s5p_config_sromc()
|
| /arch/arm/include/asm/arch-rockchip/ |
| A D | sdram_phy_px30.h | 60 void phy_dram_set_bw(void __iomem *phy_base, u32 bw); 63 struct sdram_base_params *base, u32 bw);
|
| A D | sdram_rk3288.h | 20 u8 bw; member
|
| A D | sdram_common.h | 229 unsigned int bw; member
|
| A D | sdram_rk3036.h | 327 u32 bw; member
|
| A D | sdram_rk322x.h | 21 u8 bw; member
|
| /arch/arm/mach-rockchip/ |
| A D | sdram.c | 350 u32 rank, cs0_col, bk, cs0_row, cs1_row, bw, row_3_4; in rockchip_sdram_size() local 417 bw = (2 >> ((sys_reg2 >> SYS_REG_BW_SHIFT(ch)) & in rockchip_sdram_size() 426 chipsize_mb = (1 << (cs0_row + cs0_col + bk + bg + bw - 20)); in rockchip_sdram_size() 438 cs1_row, bw, row_3_4); in rockchip_sdram_size() 443 bw, row_3_4); in rockchip_sdram_size()
|
| /arch/arm/mach-exynos/include/mach/ |
| A D | sromc.h | 28 unsigned int bw; member
|
| /arch/arm/mach-s5pc1xx/include/mach/ |
| A D | sromc.h | 31 unsigned int bw; member
|
| /arch/mips/mach-mtmips/include/mach/ |
| A D | ddr.h | 54 void ddr_calibrate(void __iomem *memc, u32 memsize, u32 bw);
|
| /arch/arm/mach-rockchip/rk3036/ |
| A D | sdram_rk3036.c | 715 (2 >> config.bw) << DDR_DIE_BW_SHIFT; in sdram_all_config()
|
Completed in 32 milliseconds