| /arch/arm/mach-mvebu/ |
| A D | lowlevel.S | 23 mcr p15, 0, r0, c8, c7, 0 @ invalidate TLBs
24 mcr p15, 0, r0, c7, c5, 0 @ invalidate icache
25 mcr p15, 0, r0, c7, c5, 6 @ invalidate BP array
26 mcr p15, 0, r0, c7, c10, 4 @ DSB
27 mcr p15, 0, r0, c7, c5, 4 @ ISB
|
| A D | lowlevel_spl.S | 40 mcr p15, 0, r0, c7, c6, 1
56 mcr p15, 0, r0, c7, c10, 5 /* @ data memory barrier */
57 mcr p15, 0, r0, c7, c14, 1 /* @ clean & invalidate D line */
58 mcr p15, 0, r0, c7, c10, 4 /* @ data sync barrier */
75 mcr p15, 0, r0, c7, c14, 1 /* @ clean & invalidate D line */
|
| /arch/arm/cpu/arm1136/ |
| A D | start.S | 71 mcr p15, 0, r0, c7, c7, 0 /* Invalidate I+D+BTB caches */
72 mcr p15, 0, r0, c8, c7, 0 /* Invalidate Unified TLB */
|
| /arch/arm/cpu/arm920t/ |
| A D | start.S | 72 mcr p15, 0, r0, c7, c7, 0 /* flush v3/v4 cache */
73 mcr p15, 0, r0, c8, c7, 0 /* flush v4 TLB */
|
| /arch/arm/cpu/arm926ejs/ |
| A D | start.S | 84 mrc p15, 0, r15, c7, c10, 3
87 mcr p15, 0, r0, c8, c7, 0 /* invalidate TLB */
88 mcr p15, 0, r0, c7, c5, 0 /* invalidate I Cache */
|
| /arch/arm/cpu/arm1176/ |
| A D | start.S | 73 mcr p15, 0, r0, c7, c7, 0 /* flush v3/v4 cache */
74 mcr p15, 0, r0, c8, c7, 0 /* flush v4 TLB */
|
| /arch/arm/mach-imx/mx7/ |
| A D | psci-suspend.S | 43 mcr p15, 0, r5, c7, c6, 2
57 mcr p15, 0, r6, c7, c5, 0
58 mcr p15, 0, r6, c7, c5, 6
|
| /arch/arm/cpu/arm946es/ |
| A D | start.S | 79 mcr p15, 0, r0, c7, c5, 0 /* flush v4 I-cache */
80 mcr p15, 0, r0, c7, c6, 0 /* flush v4 D-cache */
|
| /arch/arm/lib/ |
| A D | relocate.S | 123 mcr p15, 0, r0, c7, c7, 0 /* invalidate icache */
124 mcr p15, 0, r0, c7, c10, 4 /* drain write buffer */
|
| /arch/m68k/include/asm/coldfire/ |
| A D | skha.h | 37 u32 c7; /* 0x88 Context 7 */ member
|
| /arch/arm/cpu/armv7/ |
| A D | start.S | 136 mcr p15, 0, r0, c7, c5, 0 @ invalidate icache
219 mcr p15, 0, r0, c8, c7, 0 @ invalidate TLBs
220 mcr p15, 0, r0, c7, c5, 0 @ invalidate icache
221 mcr p15, 0, r0, c7, c5, 6 @ invalidate BP array
|
| A D | cache_v7_asm.S | 58 mcr p15, 0, r11, c7, c14, 2 @ clean & invalidate by set/way
128 mcr p15, 0, r11, c7, c6, 2 @ invalidate by set/way
|
| A D | psci.S | 200 mcr p15, 0, r11, c7, c14, 2 @ clean & invalidate by set/way
|
| /arch/arm/mach-omap2/omap3/ |
| A D | lowlevel_init.S | 34 mcr p15, 0, r0, c7, c10, 4 @ DSB
35 mcr p15, 0, r0, c7, c10, 5 @ DMB
|
| /arch/arm/mach-uniphier/arm32/ |
| A D | lowlevel_init.S | 62 mcr p15, 0, r0, c8, c7, 0 @ invalidate TLBs
|