| /arch/powerpc/cpu/mpc8xx/ |
| A D | cpu_init.c | 53 clrsetbits_be32(&immr->im_clkrst.car_sccr, ~CONFIG_SYS_SCCR_MASK, in cpu_init_f()
91 clrsetbits_be32(&immr->im_clkrst.car_plprcr, ~PLPRCR_MFACT_MSK, in cpu_init_f()
106 clrsetbits_be32(&memctl->memc_br0, ~BR_PS_MSK, BR_V); in cpu_init_f()
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| /arch/powerpc/cpu/mpc85xx/ |
| A D | p1021_serdes.c | 93 clrsetbits_be32(&serdes->srdscr3, mask, val); in fsl_serdes_init()
99 clrsetbits_be32(&serdes->srdscr4, mask, val); in fsl_serdes_init()
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| A D | fsl_corenet_serdes.c | 404 clrsetbits_be32(®s->bank[FSL_SRDS_BANK_3].pllcr0, in p4080_erratum_serdes8()
407 clrsetbits_be32(®s->bank[FSL_SRDS_BANK_3].pllcr0, in p4080_erratum_serdes8()
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| A D | cpu_init.c | 493 clrsetbits_be32(&l2cache->l2csr1, 0xff, 32 + i * 2 + 1); in enable_cluster_l2()
811 clrsetbits_be32(&lbc->lcrr, LCRR_CLKDIV, CFG_SYS_LBC_LCRR); in cpu_init_r()
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| /arch/powerpc/cpu/mpc83xx/ |
| A D | cpu_init.c | 148 clrsetbits_be32(&im->arbiter.acr, acr_mask, acr_val); in cpu_init_f()
150 clrsetbits_be32(&im->sysconf.spcr, spcr_mask, spcr_val); in cpu_init_f()
152 clrsetbits_be32(&im->clk.sccr, sccr_mask, sccr_val); in cpu_init_f()
171 clrsetbits_be32(&im->im_lbc.lcrr, lcrr_mask, lcrr_val); in cpu_init_f()
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| A D | serdes.c | 75 clrsetbits_be32(regs + FSL_SRDSCR0_OFFS, in fsl_setup_serdes()
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| A D | spd_sdram.c | 164 clrsetbits_be32(&ddr->sdram_cfg, SDRAM_CFG_MEM_EN, 0); in spd_sdram()
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| /arch/arm/cpu/armv7/ls102xa/ |
| A D | soc.c | 71 clrsetbits_be32(scfg + SCFG_USB3PRM1CR / 4, in erratum_a009008()
92 clrsetbits_be32(scfg + SCFG_USB3PRM2CR / 4, in erratum_a008997()
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| /arch/mips/mach-ath79/ |
| A D | reset.c | 131 clrsetbits_be32(pregs + AR933X_PLL_SWITCH_CLOCK_CONTROL_REG, in eth_init_ar933x()
141 clrsetbits_be32(gregs + AR933X_GMAC_REG_ETH_CFG, in eth_init_ar933x()
483 clrsetbits_be32(pregs + QCA953X_PLL_SWITCH_CLOCK_CONTROL_REG, in usb_reset_qca953x()
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| /arch/powerpc/cpu/mpc8xxx/ |
| A D | fsl_lbc.c | 42 clrsetbits_be32(&(LBC_BASE_ADDR)->lbcr, LBCR_BMT|LBCR_BMTPS, 0xf); in init_early_memctl_regs()
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| /arch/arm/include/asm/arch-fsl-layerscape/ |
| A D | soc.h | 38 #define scfg_clrsetbits32(addr, clear, set) clrsetbits_be32(addr, clear, set)
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| /arch/sandbox/include/asm/ |
| A D | io.h | 102 #define clrsetbits_be32(addr, clear, set) clrsetbits(be32, addr, clear, set) macro
178 #define clrsetbits_be32(addr, clear, set) clrsetbits(be32, addr, clear, set) macro
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| /arch/nios2/include/asm/ |
| A D | io.h | 158 #define clrsetbits_be32(addr, clear, set) clrsetbits(be32, addr, clear, set) macro
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| /arch/m68k/include/asm/ |
| A D | io.h | 229 #define clrsetbits_be32(addr, clear, set) clrsetbits(be32, addr, clear, set) macro
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| /arch/arc/include/asm/ |
| A D | io.h | 232 #define clrsetbits_be32(addr, clear, set) clrsetbits(be32, addr, clear, set) macro
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| /arch/sh/include/asm/ |
| A D | io.h | 216 #define clrsetbits_be32(addr, clear, set) clrsetbits(be32, addr, clear, set) macro
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| /arch/x86/include/asm/ |
| A D | io.h | 111 #define clrsetbits_be32(addr, clear, set) clrsetbits(be32, addr, clear, set) macro
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| /arch/powerpc/include/asm/ |
| A D | io.h | 280 #define clrsetbits_be32(addr, clear, set) clrsetbits(be32, addr, clear, set) macro
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| /arch/riscv/include/asm/ |
| A D | io.h | 156 #define clrsetbits_be32(addr, clear, set) clrsetbits(be32, addr, clear, set) macro
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| /arch/arm/include/asm/ |
| A D | io.h | 265 #define clrsetbits_be32(addr, clear, set) clrsetbits(be32, addr, clear, set) macro
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