Home
last modified time | relevance | path

Searched refs:cluster (Results 1 – 25 of 31) sorted by relevance

12

/arch/mips/mach-octeon/
A Dcvmx-pki.c202 int cluster = 0; in cvmx_pki_read_pkind_config() local
325 cluster), in cvmx_pki_write_pkind_config()
334 cluster), in cvmx_pki_write_pkind_config()
337 cluster++; in cvmx_pki_write_pkind_config()
492 cluster), in cvmx_pki_write_tag_config()
496 cluster++; in cvmx_pki_write_tag_config()
689 cluster++; in cvmx_pki_write_style_config()
824 cluster++; in cvmx_pki_pcam_write_entry()
844 unsigned int cluster; in cvmx_pki_endis_fcs_check() local
854 for (cluster = 0; cluster < CVMX_PKI_NUM_CLUSTER; cluster++) { in cvmx_pki_endis_fcs_check()
[all …]
A Dcvmx-pki-resources.c166 unsigned int cluster; in cvmx_pki_pcam_entry_alloc() local
168 for (cluster = 0; cluster < CVMX_PKI_NUM_CLUSTER; cluster++) { in cvmx_pki_pcam_entry_alloc()
169 if ((cluster_mask & (1 << cluster)) == 0) in cvmx_pki_pcam_entry_alloc()
172 CVMX_GR_TAG_PCAM(node, cluster, bank), in cvmx_pki_pcam_entry_alloc()
180 CVMX_GR_TAG_PCAM(node, cluster, bank), cluster, in cvmx_pki_pcam_entry_alloc()
184 CVMX_GR_TAG_PCAM(node, cluster, bank), cluster, in cvmx_pki_pcam_entry_alloc()
188 (int)index, (int)cluster, bank); in cvmx_pki_pcam_entry_alloc()
A Dcvmx-helper-pki.c527 unsigned int cluster = 0; in cvmx_helper_pki_set_fcs_op() local
533 while (cluster < CVMX_PKI_NUM_CLUSTER) { in cvmx_helper_pki_set_fcs_op()
536 node, CVMX_PKI_CLX_PKINDX_CFG(pknd, cluster)); in cvmx_helper_pki_set_fcs_op()
539 CVMX_PKI_CLX_PKINDX_CFG(pknd, cluster), in cvmx_helper_pki_set_fcs_op()
541 cluster++; in cvmx_helper_pki_set_fcs_op()
547 cluster = 0; in cvmx_helper_pki_set_fcs_op()
/arch/powerpc/cpu/mpc8xxx/
A Dcpu.c120 u32 cluster, type, mask = 0; in compute_ppc_cpumask() local
124 cluster = in_be32(&gur->tp_cluster[i].lower); in compute_ppc_cpumask()
126 type = init_type(cluster, j); in compute_ppc_cpumask()
144 u32 cluster, type, dsp_mask = 0; in compute_dsp_cpumask() local
148 cluster = in_be32(&gur->tp_cluster[i].lower); in compute_dsp_cpumask()
150 type = init_type(cluster, j); in compute_dsp_cpumask()
167 u32 cluster; in fsl_qoriq_dsp_core_to_cluster() local
171 cluster = in_be32(&gur->tp_cluster[i].lower); in fsl_qoriq_dsp_core_to_cluster()
173 if (init_type(cluster, j)) { in fsl_qoriq_dsp_core_to_cluster()
190 u32 cluster; in fsl_qoriq_core_to_cluster() local
[all …]
/arch/arm/cpu/armv8/fsl-layerscape/
A Dmp.c49 static void wake_secondary_core_n(int cluster, int core, int cluster_cores) in wake_secondary_core_n() argument
55 mpidr = ((cluster << 8) | core); in wake_secondary_core_n()
62 rst->brrl |= 1 << ((cluster * cluster_cores) + core); in wake_secondary_core_n()
79 u32 svr, ver, cluster, type; in fsl_layerscape_wake_seconday_cores() local
158 cluster = in_le32(&gur->tp_cluster[i].lower); in fsl_layerscape_wake_seconday_cores()
160 type = initiator_type(cluster, j); in fsl_layerscape_wake_seconday_cores()
167 cluster = in_le32(&gur->tp_cluster[i].lower); in fsl_layerscape_wake_seconday_cores()
169 type = initiator_type(cluster, j); in fsl_layerscape_wake_seconday_cores()
176 } while ((cluster & TP_CLUSTER_EOC) != TP_CLUSTER_EOC); in fsl_layerscape_wake_seconday_cores()
A Dfsl_lsch3_speed.c64 uint i, cluster; in get_sys_info() local
118 cluster = fsl_qoriq_core_to_cluster(cpu); in get_sys_info()
119 c_pll_sel = (in_le32(&clk_ctrl->clkcncsr[cluster].csr) >> 27) in get_sys_info()
122 cplx_pll += cc_group[cluster] - 1; in get_sys_info()
A Dcpu.c865 u32 initiator_type(u32 cluster, int init_id) in initiator_type() argument
882 u32 cluster, type, mask = 0; in cpu_pos_mask() local
889 type = initiator_type(cluster, j); in cpu_pos_mask()
894 } while ((cluster & TP_CLUSTER_EOC) == 0x0); in cpu_pos_mask()
903 u32 cluster, type, mask = 0; in cpu_mask() local
910 type = initiator_type(cluster, j); in cpu_mask()
918 } while ((cluster & TP_CLUSTER_EOC) == 0x0); in cpu_mask()
936 u32 cluster; in fsl_qoriq_core_to_cluster() local
943 if (initiator_type(cluster, j)) { in fsl_qoriq_core_to_cluster()
960 u32 cluster, type; in fsl_qoriq_core_to_type() local
[all …]
A Dcpu.h7 u32 initiator_type(u32 cluster, int init_id);
A Dfsl_lsch2_speed.c44 uint i, cluster; in get_sys_info() local
85 cluster = fsl_qoriq_core_to_cluster(cpu); in get_sys_info()
86 u32 c_pll_sel = (in_be32(&clk->clkcsr[cluster].clkcncsr) >> 27) in get_sys_info()
A DKconfig434 SoCs may have multiple clusters with each cluster may have multiple
531 int "Reference clock of core cluster"
/arch/arm/cpu/armv8/
A DKconfig21 bool "Enable data coherency with other cores in cluster"
27 cluster, and for A57/A72, it enables receiving of instruction
162 int "Number of CPUs per cluster"
166 The number of CPUs per cluster, suppose each cluster has same number
168 A value 0 or no definition of it works for single cluster system.
169 System with multi-cluster should difine their own exact value.
/arch/powerpc/cpu/mpc85xx/
A Dcpu_init.c455 u32 cluster, svr = get_svr(); in enable_cluster_l2() local
466 cluster = in_be32(&gur->tp_cluster[i].lower); in enable_cluster_l2()
467 if (cluster & TP_CLUSTER_EOC) in enable_cluster_l2()
479 cluster = in_be32(&gur->tp_cluster[i].lower); in enable_cluster_l2()
483 u32 idx = (cluster >> (j*8)) & TP_CLUSTER_INIT_MASK; in enable_cluster_l2()
504 } while (!(cluster & TP_CLUSTER_EOC)); in enable_cluster_l2()
A Dspeed.c173 int cluster = fsl_qoriq_core_to_cluster(cpu); in get_sys_info() local
174 u32 c_pll_sel = (in_be32(&clk->clkcsr[cluster].clkcncsr) >> 27) in get_sys_info()
177 cplx_pll += cc_group[cluster] - 1; in get_sys_info()
/arch/arm/dts/
A Darmada-ap80x.dtsi204 clock-output-names = "ap-cpu-cluster-0",
205 "ap-cpu-cluster-1",
A Dfsl-imx8-ca53.dtsi32 CLUSTER_SLEEP: cluster-sleep {
A Dk3-am654-base-board-u-boot.dtsi241 ti,cluster-mode = <0>;
A Djuno-r2.dts78 CLUSTER_SLEEP_0: cluster-sleep-0 {
A Dfsl-ls1088a.dtsi134 core-cluster {
140 core_cluster_alert: core-cluster-alert {
146 core-cluster-crit {
A Darmada-375.dtsi398 usbcluster: usb-cluster@18400 {
399 compatible = "marvell,armada-375-usb-cluster";
A Dfsl-ls1028a.dtsi161 core-cluster {
167 core_cluster_alert: core-cluster-alert {
173 core_cluster_crit: core-cluster-crit {
A Djuno-base.dtsi608 big_cluster_thermal_zone: big-cluster {
615 little_cluster_thermal_zone: little-cluster {
/arch/arm/cpu/armv7/ls102xa/
A DKconfig50 SoCs may have multiple clusters with each cluster may have multiple
A Dpsci.S96 @ Affinity level 2 - Cluster: only one cluster in LS1021xa.
/arch/arm/cpu/armv7/
A Dpsci.S161 @ Requires dense and single-cluster CPU ID space
/arch/arm/mach-rockchip/
A DKconfig243 into a big and little cluster with 4 cores each) Cortex-A53 including
244 AdvSIMD, 512KB L2 cache (for the big cluster) and 256 KB L2 cache
245 (for the little cluster), PowerVR G6110 based graphics, one video

Completed in 62 milliseconds

12