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Searched refs:cm_clkmode_dpll_core (Results 1 – 4 of 4) sorted by relevance

/arch/arm/mach-omap2/omap5/
A Dprcm-regs.c20 .cm_clkmode_dpll_core = 0x4a004120,
476 .cm_clkmode_dpll_core = 0x4a004120,
771 .cm_clkmode_dpll_core = 0x4a005120,
/arch/arm/mach-omap2/
A Dclocks-common.c392 do_setup_dpll((*prcm)->cm_clkmode_dpll_core, params, in setup_dplls()
395 do_setup_dpll((*prcm)->cm_clkmode_dpll_core, params, in setup_dplls()
A Demif-common.c1536 bypass_dpll((*prcm)->cm_clkmode_dpll_core); in sdram_init()
/arch/arm/include/asm/
A Domap_common.h25 u32 cm_clkmode_dpll_core; member

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