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Searched refs:ctrl_ddrch (Results 1 – 3 of 3) sorted by relevance

/arch/arm/mach-omap2/omap5/
A Dhwinit.c60 writel(ioregs->ctrl_ddrch, (*ctrl)->control_ddrch1_0); in io_settings_lpddr2()
61 writel(ioregs->ctrl_ddrch, (*ctrl)->control_ddrch1_1); in io_settings_lpddr2()
62 writel(ioregs->ctrl_ddrch, (*ctrl)->control_ddrch2_0); in io_settings_lpddr2()
63 writel(ioregs->ctrl_ddrch, (*ctrl)->control_ddrch2_1); in io_settings_lpddr2()
79 writel(ioregs->ctrl_ddrch, (*ctrl)->control_ddrch1_0); in io_settings_ddr3()
80 writel(ioregs->ctrl_ddrch, (*ctrl)->control_ddrch1_1); in io_settings_ddr3()
83 writel(ioregs->ctrl_ddrch, (*ctrl)->control_ddrch2_0); in io_settings_ddr3()
84 writel(ioregs->ctrl_ddrch, (*ctrl)->control_ddrch2_1); in io_settings_ddr3()
A Dhw_data.c729 .ctrl_ddrch = DDR_IO_I_34OHM_SR_FASTEST_WD_DQ_NO_PULL_DQS_PULL_DOWN,
737 .ctrl_ddrch = DDR_IO_I_40OHM_SR_FAST_WD_DQ_NO_PULL_DQS_NO_PULL,
748 .ctrl_ddrch = DDR_IO_I_40OHM_SR_FAST_WD_DQ_NO_PULL_DQS_NO_PULL_ES2,
759 .ctrl_ddrch = 0x40404040,
771 .ctrl_ddrch = 0x40404040,
783 .ctrl_ddrch = 0x40404040,
/arch/arm/include/asm/arch-omap5/
A Domap.h245 u32 ctrl_ddrch; member

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