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Searched refs:ctrl_ddrio_2 (Results 1 – 3 of 3) sorted by relevance

/arch/arm/mach-omap2/omap5/
A Dhw_data.c733 .ctrl_ddrio_2 = DDR_IO_2_CA_OUT_EN_ALL_CA_INT_EN_ALL,
742 .ctrl_ddrio_2 = DDR_IO_2_VREF_CELLS_DDR3_VALUE,
753 .ctrl_ddrio_2 = DDR_IO_2_VREF_CELLS_DDR3_VALUE_ES2,
764 .ctrl_ddrio_2 = 0x84210000,
776 .ctrl_ddrio_2 = 0x84210000,
788 .ctrl_ddrio_2 = 0x00000000,
A Dhwinit.c68 writel(ioregs->ctrl_ddrio_2, (*ctrl)->control_ddrio_2); in io_settings_lpddr2()
90 writel(ioregs->ctrl_ddrio_2, (*ctrl)->control_ddrio_2); in io_settings_ddr3()
/arch/arm/include/asm/arch-omap5/
A Domap.h250 u32 ctrl_ddrio_2; member

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