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Searched refs:davinci_syscfg_regs (Results 1 – 4 of 4) sorted by relevance

/arch/arm/mach-davinci/
A Dda850_lowlevel.c41 clrbits_le32(&davinci_syscfg_regs->cfgchip0, PLL_MASTER_LOCK); in da850_pll_init()
154 dv_maskbits(&davinci_syscfg_regs->cfgchip3, in da850_pll_init()
263 writel(DV_SYSCFG_KICK0_UNLOCK, &davinci_syscfg_regs->kick0); in arch_cpu_init()
264 writel(DV_SYSCFG_KICK1_UNLOCK, &davinci_syscfg_regs->kick1); in arch_cpu_init()
266 dv_maskbits(&davinci_syscfg_regs->suspsrc, in arch_cpu_init()
A Dmisc.c51 val = readl(&davinci_syscfg_regs->cfgchip3); in davinci_emac_mii_mode_sel()
56 writel(val, &davinci_syscfg_regs->cfgchip3); in davinci_emac_mii_mode_sel()
A Dspl.c45 switch (davinci_syscfg_regs->bootcfg) { in spl_boot_device()
/arch/arm/mach-davinci/include/mach/
A Dhardware.h281 struct davinci_syscfg_regs { struct
303 #define davinci_syscfg_regs \ argument
304 ((struct davinci_syscfg_regs *)DAVINCI_BOOTCFG_BASE)
315 #define pinmux(x) (&davinci_syscfg_regs->pinmux[x])
409 return (REG(&davinci_syscfg_regs->cfgchip3) & 0x10) ? in get_async3_src()

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