| /arch/arm/mach-imx/mx7/ |
| A D | ddr.c | 27 void mx7_dram_cfg(struct ddrc *ddrc_regs_val, struct ddrc_mp *ddrc_mp_val, in mx7_dram_cfg()
32 struct ddrc *const ddrc_regs = (struct ddrc *)DDRC_IPS_BASE_ADDR; in mx7_dram_cfg()
138 struct ddrc *const ddrc_regs = (struct ddrc *)DDRC_IPS_BASE_ADDR; in imx_ddr_size()
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| /arch/arm/mach-zynq/ |
| A D | Makefile | 10 obj-y += ddrc.o
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| /arch/arm/include/asm/arch-mx7/ |
| A D | mx7-ddr.h | 18 struct ddrc { struct
166 void mx7_dram_cfg(struct ddrc *ddrc_regs_val, struct ddrc_mp *ddrc_mp_val,
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| /arch/arm/dts/ |
| A D | r9a06g032-rzn1-snarc.dts | 43 reg-names = "ddrc", "phy";
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| A D | imx8mm-kontron-sl.dtsi | 43 &ddrc {
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| A D | imx8mm-kontron-osm-s.dtsi | 49 &ddrc {
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| A D | imx8mq.dtsi | 1352 fsl,ddrc = <&ddrc>;
1597 ddrc: memory-controller@3d400000 { label
1598 compatible = "fsl,imx8mq-ddrc", "fsl,imx8m-ddrc";
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| A D | tegra20-samsung-n1-common.dtsi | 226 "ddrc", "pmca", "pmcb", "pmcc", "pmcd",
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| A D | imx8mq-cm.dts | 72 &ddrc {
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| A D | tegra20-motorola-mot.dtsi | 272 "spif", "uda", "ck32", "ddrc",
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| A D | imx8mn.dtsi | 1294 ddrc: memory-controller@3d400000 { label
1295 compatible = "fsl,imx8mn-ddrc", "fsl,imx8m-ddrc";
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| A D | tegra20-tamonten.dtsi | 183 nvidia,pins = "ck32", "ddrc", "pmca", "pmcb",
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| A D | tegra20-asus-transformer.dtsi | 264 nvidia,pins = "ck32", "ddrc", "pmca", "pmcb",
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| A D | tegra20-acer-a500-picasso.dts | 224 nvidia,pins = "ck32", "ddrc", "pmca", "pmcb",
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| A D | tegra20-lg-star.dts | 257 "uda", "ck32", "ddrc", "pmca",
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| A D | imx8mm.dtsi | 1474 ddrc: memory-controller@3d400000 { label
1475 compatible = "fsl,imx8mm-ddrc", "fsl,imx8m-ddrc";
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| A D | tegra20-paz00.dts | 211 nvidia,pins = "ck32", "ddrc", "pmca", "pmcb",
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| A D | zynq-7000.dtsi | 200 compatible = "xlnx,zynq-ddrc-a05";
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| A D | tegra20-ventana.dts | 245 nvidia,pins = "ck32", "ddrc", "pmca", "pmcb",
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| A D | tegra20-harmony.dts | 233 nvidia,pins = "ck32", "ddrc", "pmca", "pmcb",
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| A D | imx8mm-data-modul-edm-sbc.dts | 111 &ddrc {
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| A D | tegra20-seaboard.dts | 255 nvidia,pins = "ck32", "ddrc", "pmca", "pmcb",
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| A D | imx8mq-librem5.dtsi | 307 &ddrc {
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| /arch/riscv/dts/ |
| A D | th1520.dtsi | 441 ddrc: ddrc@fffd000000 { label
442 compatible = "thead,th1520-ddrc";
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| A D | k1.dtsi | 469 reg-names = "mpmu", "apmu", "apbc", "apbs", "ciu", "dciu", "ddrc", "apbc2";
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