| /arch/x86/cpu/ivybridge/ |
| A D | sata.c | 29 dm_pci_read_config16(dev, 0x92, ®16); in common_sata_init() 32 dm_pci_write_config16(dev, 0x92, reg16); in common_sata_init() 43 int node = dev_of_offset(dev); in bd82x6x_sata_init() 75 abar = dm_pci_read_bar32(dev, 5); in bd82x6x_sata_init() 109 dm_pci_write_config8(dev, 0x09, 0x80); in bd82x6x_sata_init() 122 common_sata_init(dev, port_map); in bd82x6x_sata_init() 152 common_sata_init(dev, port_map); in bd82x6x_sata_init() 194 int node = dev_of_offset(dev); in bd82x6x_sata_enable() 236 bd82x6x_sata_enable(dev); in bd82x6x_sata_probe() 238 bd82x6x_sata_init(dev, pch); in bd82x6x_sata_probe() [all …]
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| A D | northbridge.c | 113 add_fixed_resources(dev, 6); in northbridge_init() 114 northbridge_dmi_init(dev, rev); in northbridge_init() 173 dm_pci_write_config8(dev, PAM0, 0x30); in sandybridge_setup_northbridge_bars() 174 dm_pci_write_config8(dev, PAM1, 0x33); in sandybridge_setup_northbridge_bars() 175 dm_pci_write_config8(dev, PAM2, 0x33); in sandybridge_setup_northbridge_bars() 176 dm_pci_write_config8(dev, PAM3, 0x33); in sandybridge_setup_northbridge_bars() 177 dm_pci_write_config8(dev, PAM4, 0x33); in sandybridge_setup_northbridge_bars() 178 dm_pci_write_config8(dev, PAM5, 0x33); in sandybridge_setup_northbridge_bars() 232 sandybridge_init_iommu(dev); in bd82x6x_northbridge_early_init() 247 rev = bridge_silicon_revision(dev); in bd82x6x_northbridge_probe() [all …]
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| A D | bd82x6x.c | 42 static int pch_silicon_revision(struct udevice *dev) in pch_silicon_revision() argument 47 dm_pci_read_config8(dev, PCI_REVISION_ID, &val); in pch_silicon_revision() 54 int pch_silicon_type(struct udevice *dev) in pch_silicon_type() argument 76 int cur_type = pch_silicon_type(dev); in pch_silicon_supported() 77 int cur_rev = pch_silicon_revision(dev); in pch_silicon_supported() 161 static int bd82x6x_probe(struct udevice *dev) in bd82x6x_probe() argument 164 uclass_first_device(UCLASS_LPC, &dev); in bd82x6x_probe() 171 uclass_first_device(UCLASS_AHCI, &dev); in bd82x6x_probe() 181 dm_pci_read_config32(dev, PCH_RCBA, &rcba); in bd82x6x_pch_get_spi_base() 208 dm_pci_read_config32(dev, GPIO_BASE, &base); in bd82x6x_get_gpio_base() [all …]
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| /arch/arm/mach-rockchip/rk3288/ |
| A D | syscon_rk3288.c | 57 dev_set_uclass_priv(dev, priv); in rk3288_noc_bind_of_plat() 60 dev->driver_data = dev->driver->of_match->data; in rk3288_noc_bind_of_plat() 61 debug("syscon: %s %d\n", dev->name, (uint)dev->driver_data); in rk3288_noc_bind_of_plat() 80 dev->driver_data = dev->driver->of_match->data; in rk3288_grf_bind_of_plat() 81 debug("syscon: %s %d\n", dev->name, (uint)dev->driver_data); in rk3288_grf_bind_of_plat() 100 dev->driver_data = dev->driver->of_match->data; in rk3288_sgrf_bind_of_plat() 101 debug("syscon: %s %d\n", dev->name, (uint)dev->driver_data); in rk3288_sgrf_bind_of_plat() 120 dev->driver_data = dev->driver->of_match->data; in rk3288_pmu_bind_of_plat() 121 debug("syscon: %s %d\n", dev->name, (uint)dev->driver_data); in rk3288_pmu_bind_of_plat() 129 dev->driver_data = dev->driver->of_match->data; in rk3288_syscon_bind_of_plat() [all …]
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| /arch/x86/cpu/broadwell/ |
| A D | sata.c | 44 struct sata_plat *plat = dev_get_plat(dev); in broadwell_sata_init() 57 dm_pci_read_config16(dev, 0x92, ®16); in broadwell_sata_init() 60 dm_pci_write_config16(dev, 0x92, reg16); in broadwell_sata_init() 64 dm_pci_read_config32(dev, 0x98, ®32); in broadwell_sata_init() 68 dm_pci_write_config32(dev, 0x98, reg32); in broadwell_sata_init() 73 dm_pci_write_config16(dev, 0x9c, reg16); in broadwell_sata_init() 79 dm_pci_write_config32(dev, 0x94, reg32); in broadwell_sata_init() 226 dm_pci_write_config16(dev, 0x90, map); in broadwell_sata_enable() 239 int node = dev_of_offset(dev); in broadwell_sata_of_to_plat() 251 return broadwell_sata_enable(dev); in broadwell_sata_probe() [all …]
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| A D | pch.c | 203 enable_alt_smi(dev, fdtdec_get_int(gd->fdt_blob, dev_of_offset(dev), in pch_power_options() 285 u16 lpcid = pch_type(dev); in pch_is_wpt_ulx() 311 if (pch_is_wpt(dev)) { in pch_enable_mphy() 360 pch_enable_mphy(dev); in pch_pm_init() 361 pch_pm_init_magic(dev); in pch_pm_init() 363 if (pch_is_wpt(dev)) { in pch_pm_init() 389 if (pch_is_wpt(dev)) in pch_cg_init() 434 if (pch_is_wpt(dev)) in pch_cg_init() 583 pch_misc_init(dev); in broadwell_pch_init() 592 pch_pm_init(dev); in broadwell_pch_init() [all …]
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| A D | adsp.c | 33 static int broadwell_adsp_probe(struct udevice *dev) in broadwell_adsp_probe() argument 35 struct broadwell_adsp_priv *priv = dev_get_priv(dev); in broadwell_adsp_probe() 41 bar0 = dm_pci_read_bar32(dev, 0); in broadwell_adsp_probe() 44 bar1 = dm_pci_read_bar32(dev, 1); in broadwell_adsp_probe() 52 type = dev_get_driver_data(dev); in broadwell_adsp_probe() 63 dm_pci_read_config32(dev, ADSP_PCI_VDRTCTL0, &tmp32); in broadwell_adsp_probe() 85 dm_pci_write_config32(dev, ADSP_PCI_VDRTCTL0, tmp32); in broadwell_adsp_probe() 113 dm_pci_write_config32(dev, PCI_INTERRUPT_LINE, ADSP_PCI_IRQ); in broadwell_adsp_probe() 124 static int broadwell_adsp_of_to_plat(struct udevice *dev) in broadwell_adsp_of_to_plat() argument 126 struct broadwell_adsp_priv *priv = dev_get_priv(dev); in broadwell_adsp_of_to_plat() [all …]
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| /arch/x86/include/asm/ |
| A D | pnp_def.h | 36 uint8_t port = dev >> 8; in pnp_write_config() 44 uint8_t port = dev >> 8; in pnp_read_config() 52 uint8_t device = dev & 0xff; in pnp_set_logical_device() 54 pnp_write_config(dev, 0x07, device); in pnp_set_logical_device() 59 pnp_write_config(dev, PNP_IDX_EN, enable ? 1 : 0); in pnp_set_enable() 62 static inline int pnp_read_enable(uint16_t dev) in pnp_read_enable() argument 64 return !!pnp_read_config(dev, PNP_IDX_EN); in pnp_read_enable() 70 pnp_write_config(dev, index + 1, iobase & 0xff); in pnp_set_iobase() 76 pnp_read_config(dev, index + 1); in pnp_read_iobase() 81 pnp_write_config(dev, index, irq); in pnp_set_irq() [all …]
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| /arch/arm/mach-stm32mp/ |
| A D | tamp_nvram.c | 112 cfen_field = devm_regmap_field_alloc(dev, in stm32mp2_tamp_is_compartment_isolation_enabled() 121 devm_regmap_field_free(dev, cfen_field); in stm32mp2_tamp_is_compartment_isolation_enabled() 125 devm_regmap_field_free(dev, cfen_field); in stm32mp2_tamp_is_compartment_isolation_enabled() 148 compartment_owner = devm_kcalloc(dev, in stm32mp2_tamp_get_compartment_owner() 165 devm_kfree(dev, compartment_owner); in stm32mp2_tamp_get_compartment_owner() 173 devm_regmap_field_free(dev, cid_field); in stm32mp2_tamp_get_compartment_owner() 194 bkpreg_access = devm_kcalloc(dev, in stm32mp2_tamp_get_access_rights() 245 devm_kfree(dev, bkpreg_access); in stm32mp2_tamp_get_access_rights() 480 dev_dbg(dev, in stm32_tamp_nvram_print_zones() 559 dev_dbg(dev, in stm32_tamp_nvram_print_zones() [all …]
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| A D | timers.c | 17 struct stm32_timers_plat *plat = dev_get_plat(dev); in stm32_timers_get_arr_size() 18 struct stm32_timers_priv *priv = dev_get_priv(dev); in stm32_timers_get_arr_size() 35 struct stm32_timers_plat *plat = dev_get_plat(dev); in stm32_timers_probe_hwcfgr() 36 struct stm32_timers_priv *priv = dev_get_priv(dev); in stm32_timers_probe_hwcfgr() 41 stm32_timers_get_arr_size(dev); in stm32_timers_probe_hwcfgr() 64 plat->base = dev_read_addr_ptr(dev); in stm32_timers_of_to_plat() 66 dev_err(dev, "can't get address\n"); in stm32_timers_of_to_plat() 69 plat->ipidr = (u32)dev_get_driver_data(dev); in stm32_timers_of_to_plat() 74 static int stm32_timers_probe(struct udevice *dev) in stm32_timers_probe() argument 80 ret = clk_get_by_index(dev, 0, &clk); in stm32_timers_probe() [all …]
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| A D | bsec.c | 417 plat = dev_get_plat(dev); in stm32mp_bsec_read_otp() 448 plat = dev_get_plat(dev); in stm32mp_bsec_read_shadow() 477 plat = dev_get_plat(dev); in stm32mp_bsec_write_otp() 492 plat = dev_get_plat(dev); in stm32mp_bsec_write_shadow() 512 plat = dev_get_plat(dev); in stm32mp_bsec_write_lock() 766 plat = dev_get_plat(dev); in stm32mp_bsec_probe() 812 struct udevice *dev; in bsec_dbgswenable() local 818 if (ret || !dev) { in bsec_dbgswenable() 823 plat = dev_get_plat(dev); in bsec_dbgswenable() 833 struct udevice *dev; in get_otp() local [all …]
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| /arch/sandbox/include/asm/ |
| A D | test.h | 91 void sandbox_i2c_eeprom_set_test_mode(struct udevice *dev, 175 int sandbox_get_i2s_sum(struct udevice *dev); 185 int sandbox_get_setup_called(struct udevice *dev); 192 int sandbox_get_sound_active(struct udevice *dev); 202 int sandbox_get_sound_count(struct udevice *dev); 212 int sandbox_get_sound_sum(struct udevice *dev); 228 int sandbox_get_beep_frequency(struct udevice *dev); 236 uint sandbox_spi_get_speed(struct udevice *dev); 244 uint sandbox_spi_get_mode(struct udevice *dev); 252 int sandbox_get_pch_spi_protect(struct udevice *dev); [all …]
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| A D | reset.h | 11 int sandbox_reset_query(struct udevice *dev, unsigned long id); 14 int sandbox_reset_test_get(struct udevice *dev); 15 int sandbox_reset_test_get_devm(struct udevice *dev); 16 int sandbox_reset_test_get_bulk(struct udevice *dev); 17 int sandbox_reset_test_get_bulk_devm(struct udevice *dev); 18 int sandbox_reset_test_assert(struct udevice *dev); 19 int sandbox_reset_test_assert_bulk(struct udevice *dev); 20 int sandbox_reset_test_deassert(struct udevice *dev); 21 int sandbox_reset_test_deassert_bulk(struct udevice *dev); 22 int sandbox_reset_test_free(struct udevice *dev); [all …]
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| A D | clk.h | 79 ulong sandbox_clk_query_rate(struct udevice *dev, int id); 87 int sandbox_clk_query_enable(struct udevice *dev, int id); 104 int sandbox_clk_test_get(struct udevice *dev); 113 int sandbox_clk_test_devm_get(struct udevice *dev); 122 int sandbox_clk_test_get_bulk(struct udevice *dev); 158 int sandbox_clk_test_enable(struct udevice *dev, int id); 166 int sandbox_clk_test_enable_bulk(struct udevice *dev); 175 int sandbox_clk_test_disable(struct udevice *dev, int id); 183 int sandbox_clk_test_disable_bulk(struct udevice *dev); 191 int sandbox_clk_test_release_bulk(struct udevice *dev); [all …]
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| A D | power-domain.h | 11 int sandbox_power_domain_query(struct udevice *dev, unsigned long id); 13 int sandbox_power_domain_test_get(struct udevice *dev); 14 int sandbox_power_domain_test_on(struct udevice *dev); 15 int sandbox_power_domain_test_off(struct udevice *dev); 16 int sandbox_power_domain_test_on_ll(struct udevice *dev); 17 int sandbox_power_domain_test_off_ll(struct udevice *dev); 18 int sandbox_power_domain_test_free(struct udevice *dev);
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| /arch/arm/mach-stm32mp/stm32mp1/ |
| A D | pwr_regulator.c | 41 struct stm32mp_pwr_priv *priv = dev_get_priv(dev); in stm32mp_pwr_write() 69 priv->base = dev_read_addr(dev); in stm32mp_pwr_of_to_plat() 82 static int stm32mp_pwr_bind(struct udevice *dev) in stm32mp_pwr_bind() argument 86 children = pmic_bind_children(dev, dev_ofnode(dev), pwr_children_info); in stm32mp_pwr_bind() 88 dev_dbg(dev, "no child found\n"); in stm32mp_pwr_bind() 143 uc_pdata = dev_get_uclass_plat(dev); in stm32mp_pwr_regulator_probe() 162 dev_dbg(dev, "regulator "); in stm32mp_pwr_regulator_probe() 171 dev_set_priv(dev, (void *)*p); in stm32mp_pwr_regulator_probe() 180 uc_pdata = dev_get_uclass_plat(dev); in stm32mp_pwr_regulator_set_value() 196 uc_pdata = dev_get_uclass_plat(dev); in stm32mp_pwr_regulator_get_value() [all …]
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| /arch/sandbox/lib/ |
| A D | pci_io.c | 21 struct udevice *dev; in pci_map_physmem() local 26 dev; in pci_map_physmem() 27 uclass_next_device(&dev)) { in pci_map_physmem() 35 *devp = dev; in pci_map_physmem() 45 struct udevice *dev) in pci_unmap_physmem() argument 56 struct udevice *dev; in pci_io_read() local 61 dev; in pci_io_read() 62 uclass_next_device(&dev)) { in pci_io_read() 78 struct udevice *dev; in pci_io_write() local 82 dev; in pci_io_write() [all …]
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| /arch/riscv/lib/ |
| A D | sifive_cache.c | 16 struct udevice *dev; in enable_caches() local 22 &dev); in enable_caches() 26 ret = cache_enable(dev); in enable_caches() 32 static inline void probe_cache_device(struct driver *driver, struct udevice *dev) in probe_cache_device() argument 34 for (uclass_find_first_device(UCLASS_CACHE, &dev); in probe_cache_device() 35 dev; in probe_cache_device() 36 uclass_find_next_device(&dev)) { in probe_cache_device() 37 if (dev->driver == driver) in probe_cache_device() 38 device_probe(dev); in probe_cache_device() 44 struct udevice *dev = NULL; in enable_caches() local [all …]
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| /arch/x86/cpu/intel_common/ |
| A D | p2sb.c | 52 struct p2sb_plat *plat = dev_get_plat(dev); in p2sb_early_init() 76 static int p2sb_spl_init(struct udevice *dev) in p2sb_spl_init() argument 85 int p2sb_of_to_plat(struct udevice *dev) in p2sb_of_to_plat() argument 88 struct p2sb_plat *plat = dev_get_plat(dev); in p2sb_of_to_plat() 100 plat->bdf = pci_get_devfn(dev); in p2sb_of_to_plat() 115 static int p2sb_probe(struct udevice *dev) in p2sb_probe() argument 118 return p2sb_early_init(dev); in p2sb_probe() 120 return p2sb_spl_init(dev); in p2sb_probe() 137 p2sb_set_hide_bit(dev, hide); in intel_p2sb_set_hide() 148 static int p2sb_remove(struct udevice *dev) in p2sb_remove() argument [all …]
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| A D | itss.c | 39 static int snapshot_polarities(struct udevice *dev) in snapshot_polarities() argument 41 struct itss_priv *priv = dev_get_priv(dev); in snapshot_polarities() 55 priv->irq_snapshot[i] = pcr_read32(dev, reg); in snapshot_polarities() 83 struct itss_priv *priv = dev_get_priv(dev); in restore_polarities() 98 show_polarities(dev, "Before"); in restore_polarities() 132 show_polarities(dev, "After"); in restore_polarities() 140 struct itss_priv *priv = dev_get_priv(dev); in route_pmc_gpio_gpe() 152 static int itss_bind(struct udevice *dev) in itss_bind() argument 157 dev->driver_data = X86_IRQT_ITSS; in itss_bind() 164 struct itss_priv *priv = dev_get_priv(dev); in itss_of_to_plat() [all …]
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| /arch/arm/mach-meson/ |
| A D | sm.c | 27 struct udevice *dev; in meson_get_sm_device() local 36 return dev; in meson_get_sm_device() 41 struct udevice *dev; in meson_sm_read_efuse() local 46 if (IS_ERR(dev)) in meson_sm_read_efuse() 47 return PTR_ERR(dev); in meson_sm_read_efuse() 62 struct udevice *dev; in meson_sm_write_efuse() local 67 if (IS_ERR(dev)) in meson_sm_write_efuse() 68 return PTR_ERR(dev); in meson_sm_write_efuse() 134 struct udevice *dev; in meson_sm_get_chip_id() local 141 if (IS_ERR(dev)) in meson_sm_get_chip_id() [all …]
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| /arch/arm/mach-tegra/ |
| A D | crypto.c | 15 struct udevice *dev; in sign_data_block() local 19 ret = uclass_get_device(UCLASS_AES, 0, &dev); in sign_data_block() 25 ret = dm_aes_select_key_slot(dev, 128, TEGRA_AES_SLOT_SBK); in sign_data_block() 29 return dm_aes_cmac(dev, source, signature, in sign_data_block() 35 struct udevice *dev; in encrypt_data_block() local 39 ret = uclass_get_device(UCLASS_AES, 0, &dev); in encrypt_data_block() 45 ret = dm_aes_select_key_slot(dev, 128, TEGRA_AES_SLOT_SBK); in encrypt_data_block() 49 return dm_aes_cbc_encrypt(dev, (u8 *)AES_ZERO_BLOCK, source, dest, in encrypt_data_block() 55 struct udevice *dev; in decrypt_data_block() local 59 ret = uclass_get_device(UCLASS_AES, 0, &dev); in decrypt_data_block() [all …]
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| /arch/arm/mach-socfpga/ |
| A D | altera-sysmgr.c | 27 static int altr_sysmgr_read_generic(struct udevice *dev, u32 *addr, u32 *value) in altr_sysmgr_read_generic() argument 34 dev->name, dev, (uintptr_t)addr); in altr_sysmgr_read_generic() 44 dev->name); in altr_sysmgr_read_generic() 53 static int altr_sysmgr_write_generic(struct udevice *dev, u32 *addr, u32 value) in altr_sysmgr_write_generic() argument 59 dev->name, dev, (uintptr_t)addr, value); in altr_sysmgr_write_generic() 70 dev->name); in altr_sysmgr_write_generic() 78 static int altr_sysmgr_probe(struct udevice *dev) in altr_sysmgr_probe() argument 81 struct altr_sysmgr_priv *altr_priv = dev_get_priv(dev); in altr_sysmgr_probe() 83 debug("%s: %s(dev=%p):\n", __func__, dev->name, dev); in altr_sysmgr_probe() 84 addr = dev_read_addr(dev); in altr_sysmgr_probe() [all …]
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| /arch/x86/cpu/apollolake/ |
| A D | pmc.c | 83 static int apl_disable_tco(struct udevice *dev) in apl_disable_tco() argument 104 int apl_pmc_ofdata_to_uc_plat(struct udevice *dev) in apl_pmc_ofdata_to_uc_plat() argument 107 struct apl_pmc_plat *plat = dev_get_plat(dev); in apl_pmc_ofdata_to_uc_plat() 114 ret = dev_read_u32_array(dev, "early-regs", base, in apl_pmc_ofdata_to_uc_plat() 123 plat->bdf = pci_get_devfn(dev); in apl_pmc_ofdata_to_uc_plat() 131 size = dev_read_size(dev, "gpe0-dw"); in apl_pmc_ofdata_to_uc_plat() 140 return pmc_ofdata_to_uc_plat(dev); in apl_pmc_ofdata_to_uc_plat() 162 static int enable_pmcbar(struct udevice *dev) in enable_pmcbar() argument 165 struct apl_pmc_plat *priv = dev_get_plat(dev); in enable_pmcbar() 187 static int apl_pmc_probe(struct udevice *dev) in apl_pmc_probe() argument [all …]
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| /arch/arm/mach-stm32mp/stm32mp2/ |
| A D | rifsc.c | 276 if (!dev_has_ofnode(dev)) in stm32_rifsc_child_post_bind() 288 static int stm32_rifsc_bind(struct udevice *dev) in stm32_rifsc_bind() argument 290 struct stm32_rifsc_plat *plat = dev_get_plat(dev); in stm32_rifsc_bind() 295 plat->base = dev_read_addr_ptr(dev); in stm32_rifsc_bind() 297 dev_err(dev, "can't get registers base address\n"); in stm32_rifsc_bind() 301 for (node = ofnode_first_subnode(dev_ofnode(dev)); in stm32_rifsc_bind() 321 err = lists_bind_fdt(dev, node, NULL, NULL, in stm32_rifsc_bind() 337 struct udevice *dev; in stm32_rifsc_remove() local 340 for (device_find_first_child(bus, &dev); dev; device_find_next_child(&dev)) in stm32_rifsc_remove() 341 if (device_active(dev)) in stm32_rifsc_remove() [all …]
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