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Searched refs:dfitmg1 (Results 1 – 16 of 16) sorted by relevance

/arch/arm/mach-imx/mx7/
A Dddr.c78 writel(ddrc_regs_val->dfitmg1, &ddrc_regs->dfitmg1); in mx7_dram_cfg()
/arch/arm/mach-sunxi/dram_timings/
A Dh616_lpddr3.c90 writel(0x100202, &mctl_ctl->dfitmg1); in mctl_set_timing_params()
A Da133_ddr4.c78 writel(0x100202, &mctl_ctl->dfitmg1); in mctl_set_timing_params()
A Dh616_ddr3_1333.c101 writel(0x100202, &mctl_ctl->dfitmg1); in mctl_set_timing_params()
A Dh616_lpddr4_2133.c90 writel(0x100202, &mctl_ctl->dfitmg1); in mctl_set_timing_params()
A Da133_lpddr4.c99 writel(0x100202, &mctl_ctl->dfitmg1); in mctl_set_timing_params()
A Da523_ddr3.c108 writel(0x100202, &mctl_ctl->dfitmg1); in mctl_set_timing_params()
A Dh6_ddr3_1333.c135 writel(0x040201, &mctl_ctl->dfitmg1); in mctl_set_timing_params()
A Dh6_lpddr3.c123 writel(0x040201, &mctl_ctl->dfitmg1); in mctl_set_timing_params()
A Da523_lpddr4.c115 writel(0x100202, &mctl_ctl->dfitmg1); in mctl_set_timing_params()
/arch/arm/include/asm/arch-mx7/
A Dmx7-ddr.h46 u32 dfitmg1; /* 0x0194 */ member
/arch/arm/include/asm/arch-sunxi/
A Ddram_sun55i_a523.h58 u32 dfitmg1; /* 0x194 */ member
A Ddram_sun50i_h616.h91 u32 dfitmg1; /* 0x194 */ member
A Ddram_sun50i_a133.h67 u32 dfitmg1; /* 0x194 */ member
A Ddram_sun50i_h6.h106 u32 dfitmg1; /* 0x194 */ member
/arch/arm/include/asm/arch-imx8m/
A Dddr.h60 u32 dfitmg1; member
159 u32 dfitmg1; member

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