div2 (reference) in projects: arch - OpenGrok search results

Searched refs:div2 (Results 1 – 7 of 7) sorted by relevance

/arch/arm/mach-sunxi/
A D	clock_sun8i_a83t.c	`110 unsigned int div1 = 0, div2 = 0; in clock_set_pll5() local 115 div2 << CCM_PLL5_DIV2_SHIFT \| in clock_set_pll5() 130 int div2 = ((rval & CCM_PLL6_CTRL_DIV2_MASK) >> in clock_get_pll6() local 132 return 24000000 * n / div1 / div2; in clock_get_pll6()`
A D	clock_sun50i_h6.c	`241 int div2 = ((rval & CCM_PLL6_CTRL_DIV2_MASK) >> in clock_get_pll6() local 263 return 24000000U * n / m / div1 / div2; in clock_get_pll6()`
/arch/arm/mach-s5pc1xx/include/mach/
A D	clock.h	`30 unsigned int div2; member 66 unsigned int div2; member`
/arch/arm/mach-keystone/include/mach/
A D	clock_defs.h	`25 u32 div2; /* 1c */ member`
/arch/arm/mach-imx/imx9/
A D	clock.c	`114 bool div2, bool fracpll) in decode_pll_pfd() argument 126 (div2 && !(dfs_ctrl & PLL_DFS_CTRL_CLKOUT_DIV2)) \|\| in decode_pll_pfd() 127 (!div2 && !(dfs_ctrl & PLL_DFS_CTRL_CLKOUT))) in decode_pll_pfd() 141 if (div2) in decode_pll_pfd()`
/arch/arm/dts/
A D	am33xx-clocks.dtsi	`235 dpll_ddr_m2_div2_ck: clock-dpll-ddr-m2-div2 { 388 dpll_core_m4_div2_ck: clock-dpll-core-m4-div2 {`
A D	socfpga_agilex5.dtsi	`110 cb_intosc_hs_div2_clk: cb-intosc-hs-div2-clk {`

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