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Searched refs:div_fsys3 (Results 1 – 3 of 3) sorted by relevance

/arch/arm/mach-exynos/
A Dclock_init_exynos4.c70 writel(CLK_DIV_FSYS3_VAL, &clk->div_fsys3); in system_clock_init()
A Dclock.c818 ratio = readl(&clk->div_fsys3); in exynos4_get_mmc_clk()
819 pre_ratio = readl(&clk->div_fsys3); in exynos4_get_mmc_clk()
855 addr = (unsigned int)&clk->div_fsys3; in exynos4_set_mmc_clk()
/arch/arm/mach-exynos/include/mach/
A Dclock.h98 unsigned int div_fsys3; member
335 unsigned int div_fsys3; member

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