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Searched refs:div_isp1 (Results 1 – 3 of 3) sorted by relevance

/arch/arm/mach-exynos/
A Dclock.c497 div = readl(&clk->div_isp1); in exynos542x_get_periph_rate()
498 sub_div = readl(&clk->div_isp1); in exynos542x_get_periph_rate()
1552 reg = &clk->div_isp1; in exynos5420_set_spi_clk()
1554 pre_reg = &clk->div_isp1; in exynos5420_set_spi_clk()
1558 reg = &clk->div_isp1; in exynos5420_set_spi_clk()
1560 pre_reg = &clk->div_isp1; in exynos5420_set_spi_clk()
A Dclock_init_exynos5.c768 writel(CLK_DIV_ISP1_VAL, &clk->div_isp1); in exynos5250_system_clock_init()
946 writel(CLK_DIV_ISP1_VAL, &clk->div_isp1); in exynos5420_system_clock_init()
/arch/arm/mach-exynos/include/mach/
A Dclock.h499 unsigned int div_isp1; member
636 unsigned int div_isp1; member
1142 unsigned int div_isp1; member

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