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Searched refs:div_peril0 (Results 1 – 3 of 3) sorted by relevance

/arch/arm/mach-exynos/
A Dclock_init_exynos4.c71 writel(CLK_DIV_PERIL0_VAL, &clk->div_peril0); in system_clock_init()
A Dclock.c733 ratio = readl(&clk->div_peril0); in exynos4_get_uart_clk()
778 ratio = readl(&clk->div_peril0); in exynos4x12_get_uart_clk()
/arch/arm/mach-exynos/include/mach/
A Dclock.h99 unsigned int div_peril0; member
336 unsigned int div_peril0; member

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