Searched refs:divisor (Results 1 – 16 of 16) sorted by relevance
| /arch/arm/lib/ |
| A D | lib1funcs.S | 33 mov \divisor, \divisor, lsl \result
44 moveq \divisor, \divisor, lsl #3
54 movlo \divisor, \divisor, lsl #4
62 movlo \divisor, \divisor, lsl #1
85 movne \divisor, \divisor, lsr #4
101 movhs \divisor, \divisor, lsr #16
106 movhs \divisor, \divisor, lsr #8
110 movhs \divisor, \divisor, lsr #4
141 movlo \divisor, \divisor, lsl #4
149 movlo \divisor, \divisor, lsl #1
[all …]
|
| A D | div64.S | 53 bls 9f @ divisor is 0 or 1
55 beq 8f @ divisor is power of 2
62 @ Align divisor with upper part of dividend.
63 @ The aligned divisor is stored in yl preserving the original.
105 @ divisor for comparisons, considering the carry-out bit as well.
142 @ divisor at this point since divisor can not be smaller than 3 here.
150 8: @ Division by a power of 2: determine what that divisor order is
|
| /arch/arm/mach-uniphier/debug-uart/ |
| A D | debug-uart.c | 61 unsigned int divisor; in _debug_uart_init() local
66 divisor = uniphier_ld4_debug_uart_init(); in _debug_uart_init()
71 divisor = uniphier_pro4_debug_uart_init(); in _debug_uart_init()
76 divisor = uniphier_sld8_debug_uart_init(); in _debug_uart_init()
81 divisor = uniphier_pro5_debug_uart_init(); in _debug_uart_init()
86 divisor = uniphier_pxs2_debug_uart_init(); in _debug_uart_init()
91 divisor = uniphier_ld6b_debug_uart_init(); in _debug_uart_init()
100 writel(divisor, base + UNIPHIER_UART_LDR); in _debug_uart_init()
|
| /arch/mips/mach-octeon/ |
| A D | cvmx-helper-jtag.c | 34 int divisor; in cvmx_helper_qlm_jtag_init() local
36 divisor = gd->bus_clk / (1000000 * (OCTEON_IS_MODEL(OCTEON_CN68XX) ? 10 : 25)); in cvmx_helper_qlm_jtag_init()
38 divisor = (divisor - 1) >> 2; in cvmx_helper_qlm_jtag_init()
40 while (divisor) { in cvmx_helper_qlm_jtag_init()
42 divisor >>= 1; in cvmx_helper_qlm_jtag_init()
|
| A D | octeon_qlm.c | 744 int divisor, a_clkdiv; in __dlm2_sata_uctl_init_cn70xx() local
789 if (divisor <= 4) { in __dlm2_sata_uctl_init_cn70xx()
790 a_clkdiv = divisor - 1; in __dlm2_sata_uctl_init_cn70xx()
791 } else if (divisor <= 6) { in __dlm2_sata_uctl_init_cn70xx()
793 divisor = 6; in __dlm2_sata_uctl_init_cn70xx()
794 } else if (divisor <= 8) { in __dlm2_sata_uctl_init_cn70xx()
796 divisor = 8; in __dlm2_sata_uctl_init_cn70xx()
797 } else if (divisor <= 16) { in __dlm2_sata_uctl_init_cn70xx()
799 divisor = 16; in __dlm2_sata_uctl_init_cn70xx()
800 } else if (divisor <= 24) { in __dlm2_sata_uctl_init_cn70xx()
[all …]
|
| /arch/mips/mach-octeon/include/mach/ |
| A D | octeon_ddr.h | 568 static inline u64 divide_nint(u64 dividend, u64 divisor) in divide_nint() argument
572 quotent = dividend / divisor; in divide_nint()
573 remainder = dividend % divisor; in divide_nint()
574 return (quotent + ((remainder * 2) >= divisor)); in divide_nint()
578 static inline u64 divide_roundup(u64 dividend, u64 divisor) in divide_roundup() argument
580 return ((dividend + divisor - 1) / divisor); in divide_roundup()
|
| /arch/arm/dts/ |
| A D | armada-ap806.dtsi | 35 divisor = <1000>;
|
| A D | armada-ap807.dtsi | 35 divisor = <1000>;
|
| /arch/arm/include/asm/arch-omap3/ |
| A D | dss.h | 70 u32 divisor; /* 0x70 */ member
206 u32 divisor; member
|
| /arch/arm/mach-versal-net/ |
| A D | Kconfig | 26 Setup time clock divisor for input clock.
|
| /arch/arm/mach-versal2/ |
| A D | Kconfig | 34 Setup time clock divisor for input clock.
|
| /arch/arm/mach-versal/ |
| A D | Kconfig | 26 Setup time clock divisor for input clock.
|
| /arch/arm/include/asm/arch-tegra/ |
| A D | clock.h | 188 unsigned divisor);
|
| /arch/arc/dts/ |
| A D | hsdk-common.dtsi | 113 * divisor (div-by-2) in HSDK platform code.
|
| /arch/arm/mach-sc5xx/ |
| A D | Kconfig | 334 CGU0 SCLK1 Extended divisor register.
439 CGU1 SCLK0 Extended divisor register.
448 CGU1 SCLK1 Extended divisor register.
|
| /arch/arm/mach-tegra/ |
| A D | clock.c | 173 unsigned divisor) in clock_ll_set_source_divisor() argument
184 value |= divisor << OUT_CLK_DIVISOR_SHIFT; in clock_ll_set_source_divisor()
|
Completed in 43 milliseconds