| /arch/arm/mach-mvebu/ |
| A D | efuse.c | 109 val.dwords.d[0] = readl(&efuse->bits_31_0); in do_prog_efuse() 111 val.lock = readl(&efuse->bit64); in do_prog_efuse() 120 writel(val.dwords.d[0], &efuse->bits_31_0); in do_prog_efuse() 124 writel(val.lock, &efuse->bit64); in do_prog_efuse() 132 struct mvebu_hd_efuse *efuse; in prog_efuse() local 139 efuse = get_efuse_line(nr); in prog_efuse() 140 if (!efuse) in prog_efuse() 230 struct mvebu_hd_efuse *efuse; in mvebu_read_efuse() local 237 efuse = get_efuse_line(nr); in mvebu_read_efuse() 238 if (!efuse) in mvebu_read_efuse() [all …]
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| A D | Makefile | 34 obj-$(CONFIG_MVEBU_EFUSE) += efuse.o
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| /arch/arm/mach-omap2/ |
| A D | clocks-common.c | 495 if (!v->efuse.reg[opp]) in optimize_vcore_voltage() 498 switch (v->efuse.reg_bits) { in optimize_vcore_voltage() 500 val = readw(v->efuse.reg[opp]); in optimize_vcore_voltage() 503 val = readl(v->efuse.reg[opp]); in optimize_vcore_voltage() 507 v->efuse.reg[opp], v->efuse.reg_bits); in optimize_vcore_voltage() 513 v->efuse.reg[opp], v->efuse.reg_bits, v->value[opp]); in optimize_vcore_voltage() 518 __func__, v->efuse.reg[opp], v->efuse.reg_bits, v->value[opp], in optimize_vcore_voltage() 602 abb_setup(vcores->mpu.efuse.reg[opp], in scale_vcores() 615 abb_setup(vcores->mm.efuse.reg[opp], in scale_vcores() 628 abb_setup(vcores->gpu.efuse.reg[opp], in scale_vcores() [all …]
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| /arch/arm/mach-mvebu/armada3700/ |
| A D | Makefile | 6 obj-$(CONFIG_MVEBU_EFUSE) += efuse.o
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| /arch/arm/dts/ |
| A D | exynos5420-smdk5420.dts | 31 samsung,efuse-min-value = <40>; 32 samsung,efuse-value = <55>; 33 samsung,efuse-max-value = <100>;
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| A D | uniphier-pro5.dtsi | 394 efuse@100 { 395 compatible = "socionext,uniphier-efuse"; 399 efuse@130 { 400 compatible = "socionext,uniphier-efuse"; 404 efuse@200 { 405 compatible = "socionext,uniphier-efuse"; 409 efuse@300 { 410 compatible = "socionext,uniphier-efuse"; 414 efuse@400 { 415 compatible = "socionext,uniphier-efuse";
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| A D | zynqmp.dtsi | 225 /* efuse access */ 226 efuse_dna: efuse-dna@c { 229 efuse_usr0: efuse-usr0@20 { 232 efuse_usr1: efuse-usr1@24 { 235 efuse_usr2: efuse-usr2@28 { 238 efuse_usr3: efuse-usr3@2c { 241 efuse_usr4: efuse-usr4@30 { 244 efuse_usr5: efuse-usr5@34 { 247 efuse_usr6: efuse-usr6@38 { 250 efuse_usr7: efuse-usr7@3c { [all …]
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| A D | exynos5800-peach-pi.dts | 66 samsung,efuse-min-value = <40>; 67 samsung,efuse-value = <55>; 68 samsung,efuse-max-value = <100>;
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| A D | uniphier-ld4.dtsi | 355 efuse@100 { 356 compatible = "socionext,uniphier-efuse"; 360 efuse@130 { 361 compatible = "socionext,uniphier-efuse";
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| A D | uniphier-sld8.dtsi | 360 efuse@100 { 361 compatible = "socionext,uniphier-efuse"; 365 efuse@200 { 366 compatible = "socionext,uniphier-efuse";
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| A D | exynos5250-smdk5250.dts | 100 samsung,efuse-min-value = <40>; 101 samsung,efuse-value = <55>; 102 samsung,efuse-max-value = <100>;
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| A D | uniphier-pro4.dtsi | 430 efuse@100 { 431 compatible = "socionext,uniphier-efuse"; 435 efuse@130 { 436 compatible = "socionext,uniphier-efuse"; 440 efuse@200 { 441 compatible = "socionext,uniphier-efuse";
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| A D | exynos5420-peach-pit.dts | 54 samsung,efuse-min-value = <40>; 55 samsung,efuse-value = <55>; 56 samsung,efuse-max-value = <100>;
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| A D | uniphier-ld11.dtsi | 570 efuse@100 { 571 compatible = "socionext,uniphier-efuse"; 575 efuse@200 { 576 compatible = "socionext,uniphier-efuse";
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| A D | exynos5250-snow.dts | 339 samsung,efuse-min-value = <40>; 340 samsung,efuse-value = <55>; 341 samsung,efuse-max-value = <100>;
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| A D | zynq-7000.dtsi | 405 efuse: efuse@f800d000 { label 406 compatible = "xlnx,zynq-efuse";
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| A D | omap36xx.dtsi | 54 /*uV ABB efuse rbb_m fbb_m vset_m*/
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| A D | uniphier-pxs2.dtsi | 510 efuse@100 { 511 compatible = "socionext,uniphier-efuse"; 515 efuse@200 { 516 compatible = "socionext,uniphier-efuse";
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| A D | uniphier-ld20.dtsi | 635 efuse@100 { 636 compatible = "socionext,uniphier-efuse"; 640 efuse@200 { 641 compatible = "socionext,uniphier-efuse";
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| A D | uniphier-pxs3.dtsi | 461 efuse@100 { 462 compatible = "socionext,uniphier-efuse"; 466 efuse@200 { 467 compatible = "socionext,uniphier-efuse";
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| A D | mt7987.dtsi | 748 efuse: efuse@11d30000 { label 749 compatible = "mediatek,efuse";
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| A D | exynos5250-spring.dts | 164 samsung,efuse-min-value = <40>; 165 samsung,efuse-value = <55>; 166 samsung,efuse-max-value = <100>;
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| /arch/arm/mach-omap2/omap5/ |
| A D | hw_data.c | 368 .mpu.efuse.reg[OPP_NOM] = OMAP5_ES2_PROD_MPU_OPNO_VMIN, 369 .mpu.efuse.reg_bits = OMAP5_ES2_PROD_REGBITS, 371 .core.efuse.reg[OPP_NOM] = OMAP5_ES2_PROD_CORE_OPNO_VMIN, 372 .core.efuse.reg_bits = OMAP5_ES2_PROD_REGBITS, 374 .mm.efuse.reg[OPP_NOM] = OMAP5_ES2_PROD_MM_OPNO_VMIN, 375 .mm.efuse.reg_bits = OMAP5_ES2_PROD_REGBITS,
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| /arch/arm/mach-aspeed/ast2600/ |
| A D | board_common.c | 96 if (readl(scu->efuse) & SCU_EFUSE_DIS_VGA) in board_add_ram_info()
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| /arch/arm/mach-k3/r5/ |
| A D | Kconfig | 8 Enabling this will allow Socs with the proper efuse to run at a lower
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