1 /* SPDX-License-Identifier: GPL-2.0+ */ 2 /* 3 * (C) Copyright 2002-2010 4 * Wolfgang Denk, DENX Software Engineering, wd@denx.de. 5 */ 6 7 #ifndef __ASM_GBL_DATA_H 8 #define __ASM_GBL_DATA_H 9 10 #ifndef __ASSEMBLY__ 11 12 #include <config.h> 13 14 #include <linux/types.h> 15 #include <asm/u-boot.h> 16 17 /* Architecture-specific global data */ 18 struct arch_global_data { 19 #if defined(CONFIG_FSL_ESDHC) || defined(CONFIG_FSL_ESDHC_IMX) 20 u32 sdhc_clk; 21 #endif 22 #if CONFIG_IS_ENABLED(ACPI) 23 ulong table_start; /* Start address of ACPI tables */ 24 ulong table_end; /* End address of ACPI tables */ 25 ulong table_start_high; /* Start address of high ACPI tables */ 26 ulong table_end_high; /* End address of high ACPI tables */ 27 #endif 28 #if defined(CONFIG_FSL_ESDHC) 29 u32 sdhc_per_clk; 30 #endif 31 32 #if defined(CONFIG_U_QE) 33 u32 qe_clk; 34 u32 brg_clk; 35 uint mp_alloc_base; 36 uint mp_alloc_top; 37 #endif /* CONFIG_U_QE */ 38 39 #ifdef CONFIG_AT91FAMILY 40 /* "static data" needed by at91's clock.c */ 41 unsigned long cpu_clk_rate_hz; 42 unsigned long main_clk_rate_hz; 43 unsigned long mck_rate_hz; 44 unsigned long plla_rate_hz; 45 unsigned long pllb_rate_hz; 46 unsigned long at91_pllb_usb_init; 47 #endif 48 /* "static data" needed by most of timer.c on ARM platforms */ 49 unsigned long timer_rate_hz; 50 unsigned int tbu; 51 unsigned int tbl; 52 unsigned long lastinc; 53 unsigned long long timer_reset_value; 54 #if !(CONFIG_IS_ENABLED(SYS_ICACHE_OFF) && CONFIG_IS_ENABLED(SYS_DCACHE_OFF)) 55 unsigned long tlb_addr; 56 unsigned long tlb_size; 57 #if defined(CONFIG_ARM64) 58 unsigned long tlb_fillptr; 59 unsigned long tlb_emerg; 60 #endif 61 #endif 62 #ifdef CFG_SYS_MEM_RESERVE_SECURE 63 #define MEM_RESERVE_SECURE_SECURED 0x1 64 #define MEM_RESERVE_SECURE_MAINTAINED 0x2 65 #define MEM_RESERVE_SECURE_ADDR_MASK (~0x3) 66 /* 67 * Secure memory addr 68 * This variable needs maintenance if the RAM base is not zero, 69 * or if RAM splits into non-consecutive banks. It also has a 70 * flag indicating the secure memory is marked as secure by MMU. 71 * Flags used: 0x1 secured 72 * 0x2 maintained 73 */ 74 phys_addr_t secure_ram; 75 unsigned long tlb_allocated; 76 #endif 77 #ifdef CONFIG_RESV_RAM 78 /* 79 * Reserved RAM for memory resident, eg. Management Complex (MC) 80 * driver which continues to run after U-Boot exits. 81 */ 82 phys_addr_t resv_ram; 83 #endif 84 85 #ifdef CONFIG_ARCH_OMAP2PLUS 86 u32 omap_boot_device; 87 u32 omap_boot_mode; 88 u8 omap_ch_flags; 89 #endif 90 #if defined(CONFIG_FSL_LSCH3) && defined(CONFIG_SYS_FSL_HAS_DP_DDR) 91 unsigned long mem2_clk; 92 #endif 93 94 #ifdef CONFIG_ARCH_IMX8 95 struct udevice *scu_dev; 96 #endif 97 98 #ifdef CONFIG_IMX_ELE 99 struct udevice *ele_dev; 100 u32 soc_rev; 101 u32 lifecycle; 102 u32 uid[4]; 103 #endif 104 105 #ifdef CONFIG_ARCH_IMX8ULP 106 bool m33_handshake_done; 107 #endif 108 #ifdef CONFIG_SMBIOS 109 ulong smbios_start; /* Start address of SMBIOS table */ 110 #endif 111 }; 112 113 #include <asm-generic/global_data.h> 114 115 #if defined(__clang__) || defined(LTO_ENABLE) 116 117 #define DECLARE_GLOBAL_DATA_PTR 118 #define gd get_gd() 119 get_gd(void)120static inline gd_t *get_gd(void) 121 { 122 gd_t *gd_ptr; 123 124 #ifdef CONFIG_ARM64 125 __asm__ volatile("mov %0, x18\n" : "=r" (gd_ptr)); 126 #else 127 __asm__ volatile("mov %0, r9\n" : "=r" (gd_ptr)); 128 #endif 129 130 return gd_ptr; 131 } 132 133 #else 134 135 #ifdef CONFIG_ARM64 136 #define DECLARE_GLOBAL_DATA_PTR register gd_t *gd asm ("x18") 137 #else 138 #define DECLARE_GLOBAL_DATA_PTR register gd_t *gd asm ("r9") 139 #endif 140 #endif 141 set_gd(gd_t * gd_ptr)142static inline void set_gd(gd_t *gd_ptr) 143 { 144 #ifdef CONFIG_ARM64 145 __asm__ volatile("ldr x18, %0\n" : : "m"(gd_ptr)); 146 #elif __ARM_ARCH >= 7 147 __asm__ volatile("ldr r9, %0\n" : : "m"(gd_ptr)); 148 #else 149 __asm__ volatile("mov r9, %0\n" : : "r"(gd_ptr)); 150 #endif 151 } 152 153 #endif /* __ASSEMBLY__ */ 154 155 #endif /* __ASM_GBL_DATA_H */ 156