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Searched refs:emif (Results 1 – 12 of 12) sorted by relevance

/arch/arm/mach-omap2/
A Demif-common.c33 reg = readl(&emif->emif_pwr_mgmt_ctrl); in set_lpmode_selfrefresh()
37 writel(reg, &emif->emif_pwr_mgmt_ctrl); in set_lpmode_selfrefresh()
40 readl(&emif->emif_pwr_mgmt_ctrl); in set_lpmode_selfrefresh()
95 iodft = readl(&emif->emif_iodft_tlgc); in emif_reset_phy()
97 writel(iodft, &emif->emif_iodft_tlgc); in emif_reset_phy()
195 &emif->emif_l3_config); in emif_update_timings()
198 &emif->emif_l3_config); in emif_update_timings()
201 &emif->emif_l3_config); in emif_update_timings()
223 &emif->emif_ddr_phy_ctrl_1); in omap5_ddr3_leveling()
236 readl(&emif->emif_rd_wr_lvl_ctl); in omap5_ddr3_leveling()
[all …]
A DMakefile24 obj-y += emif-common.o
A Dclocks-common.c379 struct emif_reg_struct *emif = (struct emif_reg_struct *)EMIF1_BASE; in setup_dplls() local
390 if (emif_sdram_type(readl(&emif->emif_sdram_config)) == in setup_dplls()
/arch/arm/mach-omap2/omap5/
A DMakefile8 obj-y += emif.o
A Dsdram.c513 struct emif_reg_struct *emif = (struct emif_reg_struct *)base; in do_ext_phy_settings_omap5() local
516 emif_ext_phy_ctrl_base = (u32 *) &(emif->emif_ddr_ext_phy_ctrl_1); in do_ext_phy_settings_omap5()
543 struct emif_reg_struct *emif = (struct emif_reg_struct *)base; in do_ext_phy_settings_dra7() local
554 emif_ext_phy_ctrl_base = (u32 *)&(emif->emif_ddr_ext_phy_ctrl_1); in do_ext_phy_settings_dra7()
A Dhwinit.c126 struct emif_reg_struct *emif = (struct emif_reg_struct *)EMIF1_BASE; in do_io_settings() local
182 if (emif_sdram_type(emif->emif_sdram_config) == EMIF_SDRAM_TYPE_LPDDR2) in do_io_settings()
/arch/arm/dts/
A Dam33xx.dtsi594 emif: emif@4c000000 { label
595 compatible = "ti,emif-am3352";
597 ti,hwmods = "emif";
A Dam4372.dtsi129 emif: emif@4c000000 { label
130 compatible = "ti,emif-am4372";
132 ti,hwmods = "emif";
A Dk3-j721s2-ddr.dtsi19 emif-config = <MULTI_DDR_CFG_HYBRID_SELECT>;
20 emif-active = <MULTI_DDR_CFG_EMIFS_ACTIVE>;
A Dk3-j784s4-j742s2-ddr.dtsi23 emif-config = <MULTI_DDR_CFG_HYBRID_SELECT>;
24 emif-active = <MULTI_DDR_CFG_EMIFS_ACTIVE>;
A Ddra7xx-clocks.dtsi1001 emif_phy_dclk_div: clock-emif-phy-dclk-div@190 {
/arch/arm/include/asm/
A Demif.h1254 struct emif_reg_struct *emif = (struct emif_reg_struct *)base; in get_emif_rev() local
1256 return (readl(&emif->emif_mod_id_rev) & EMIF_REG_MAJOR_REVISION_MASK) in get_emif_rev()

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