1 /* SPDX-License-Identifier: GPL-2.0 */ 2 /* 3 * Copyright (C) 2020 Marvell International Ltd. 4 * 5 * Helper functions to abstract board specific data about 6 * network ports from the rest of the cvmx-helper files. 7 */ 8 9 #ifndef __CVMX_HELPER_BOARD_H__ 10 #define __CVMX_HELPER_BOARD_H__ 11 12 #include <asm-generic/gpio.h> 13 14 #define CVMX_VSC7224_NAME_LEN 16 15 16 typedef enum { 17 USB_CLOCK_TYPE_REF_12, 18 USB_CLOCK_TYPE_REF_24, 19 USB_CLOCK_TYPE_REF_48, 20 USB_CLOCK_TYPE_CRYSTAL_12, 21 } cvmx_helper_board_usb_clock_types_t; 22 23 typedef enum cvmx_phy_type { 24 BROADCOM_GENERIC_PHY, 25 MARVELL_GENERIC_PHY, 26 CORTINA_PHY, /** Now Inphi */ 27 AQUANTIA_PHY, 28 GENERIC_8023_C22_PHY, 29 GENERIC_8023_C45_PHY, 30 INBAND_PHY, 31 QUALCOMM_S17, /** Qualcomm QCA833X switch */ 32 VITESSE_VSC8490_PHY, /** Vitesse VSC8490 is non-standard for SGMII */ 33 FAKE_PHY, /** Unsupported or no PHY, use GPIOs for LEDs */ 34 } cvmx_phy_type_t; 35 36 /** Used to record the host mode used by the Cortina CS4321 PHY */ 37 typedef enum { 38 CVMX_PHY_HOST_MODE_UNKNOWN, 39 CVMX_PHY_HOST_MODE_SGMII, 40 CVMX_PHY_HOST_MODE_QSGMII, 41 CVMX_PHY_HOST_MODE_XAUI, 42 CVMX_PHY_HOST_MODE_RXAUI, 43 } cvmx_phy_host_mode_t; 44 45 typedef enum { 46 set_phy_link_flags_autoneg = 0x1, 47 set_phy_link_flags_flow_control_dont_touch = 0x0 << 1, 48 set_phy_link_flags_flow_control_enable = 0x1 << 1, 49 set_phy_link_flags_flow_control_disable = 0x2 << 1, 50 set_phy_link_flags_flow_control_mask = 0x3 << 1, 51 } cvmx_helper_board_set_phy_link_flags_types_t; 52 53 /** 54 * The EBB6600 board uses a MDIO mux device to select between the two QLM 55 * modules since both QLM modules share the same PHY addresses. The 56 * MDIO mux is controlled via GPIO by a GPIO device that is also on 57 * the TWSI bus rather than native OCTEON GPIO libes. 58 * 59 * To further complicate matters, the TWSI GPIO device sits behind 60 * a TWSI mux device as well, making accessing the MDIO devices on 61 * this board a very complex operation involving writing to the TWSI mux, 62 * followed by the MDIO mux device. 63 */ 64 /** Maximum number of GPIO devices used to control the MDIO mux */ 65 #define CVMX_PHY_MUX_MAX_GPIO 2 66 67 /** Type of MDIO mux device, currently OTHER isn't supported */ 68 typedef enum { 69 SN74CBTLV3253, /** SN74CBTLV3253 I2C device */ 70 OTHER /** Unknown/other */ 71 } cvmx_phy_mux_type_t; 72 73 /** Type of GPIO line controlling MDIO mux */ 74 typedef enum { 75 GPIO_OCTEON, /** Native OCTEON */ 76 GPIO_PCA8574 /** TWSI mux device */ 77 } cvmx_phy_gpio_type_t; 78 79 /* Forward declarations */ 80 struct cvmx_fdt_sfp_info; /** Defined in cvmx-helper-fdt.h */ 81 struct cvmx_vsc7224; 82 struct cvmx_fdt_gpio_info; /** Defined in cvmx-helper-fdt.h */ 83 struct cvmx_fdt_i2c_bus_info; /** Defined in cvmx-helper-fdt.h */ 84 struct cvmx_phy_info; 85 struct cvmx_fdt_i2c_bus_info; 86 struct cvmx_fdt_gpio_info; 87 struct cvmx_fdt_gpio_led; 88 89 /** 90 * @INTERNAL 91 * This data structure is used when the port LEDs are wired up to Octeon's GPIO 92 * lines instead of to a traditional PHY. 93 */ 94 struct cvmx_phy_gpio_leds { 95 struct cvmx_phy_gpio_leds *next; /** For when ports are grouped together */ 96 u64 last_rx_count; /** Counters used to check for activity */ 97 u64 last_tx_count; /** Counters used to check for activity */ 98 u64 last_activity_poll_time; /** Last time activity was polled */ 99 u64 last_link_poll_time; /** Last time link was polled */ 100 int of_offset; 101 int link_poll_interval_ms; /** Link polling interval in ms */ 102 int activity_poll_interval_ms; /** Activity polling interval in ms */ 103 struct cvmx_fdt_gpio_led *link_status; 104 struct cvmx_fdt_gpio_led *error; 105 struct cvmx_fdt_gpio_led *rx_activity; 106 struct cvmx_fdt_gpio_led *tx_activity; 107 struct cvmx_fdt_gpio_led *identify; 108 109 struct cvmx_fdt_gpio_info *link_status_gpio; 110 struct cvmx_fdt_gpio_info *error_gpio; 111 /** Type of GPIO for error LED */ 112 /** If GPIO expander, describe the bus to the expander */ 113 struct cvmx_fdt_gpio_info *rx_activity_gpio; 114 struct cvmx_fdt_gpio_info *tx_activity_gpio; 115 116 u16 rx_activity_hz; /** RX activity blink time in hz */ 117 u16 tx_activity_hz; /** TX activity blink time in hz */ 118 /** 119 * Set if activity and/or link is using an Inphi/Cortina CS4343 or 120 * compatible phy that requires software assistance. NULL if not used. 121 */ 122 bool link_status_active_low; /** True if active link is active low */ 123 bool error_status_active_low; /** True if error LED is active low */ 124 bool error_active_low; /** True if error is active low */ 125 bool rx_activity_active_low; /** True if rx activity is active low */ 126 bool tx_activity_active_low; /** True if tx activity is active low */ 127 /** Set true if LEDs are shared on an interface by all ports */ 128 bool interface_leds; 129 int8_t rx_gpio_timer; /** GPIO clock generator timer [0-3] */ 130 int8_t tx_gpio_timer; /** GPIO clock generator timer [0-3] */ 131 132 /** True if LOS signal activates error LED */ 133 bool los_generate_error; 134 /** True if the error LED is hooked up to a GPIO expander */ 135 bool error_gpio_expander; 136 /** True if the link and RX activity LEDs are shared */ 137 bool link_and_rx_activity_shared; 138 /** True if the link and TX activity LEDs are shared */ 139 bool link_and_tx_activity_shared; 140 /** True if the RX activity and TX activity LEDs are shared */ 141 bool rx_and_tx_activity_shared; 142 /** True if link is driven directly by the hardware */ 143 bool link_led_hw_link; 144 bool error_lit; /** True if ERROR LED is lit */ 145 bool quad_sfp_mode; /** True if using four SFPs for XLAUI */ 146 /** User-defined function to update the link LED */ 147 void (*update_link_led)(int xiface, int index, cvmx_helper_link_info_t result); 148 /** User-defined function to update the rx activity LED */ 149 void (*update_rx_activity_led)(struct cvmx_phy_gpio_leds *led, int xiface, int index, 150 bool check_time); 151 }; 152 153 /** This structure contains the tap values to use for various cable lengths */ 154 struct cvmx_vsc7224_tap { 155 u16 len; /** Starting cable length for tap values */ 156 u16 main_tap; /** Main tap value to use */ 157 u16 pre_tap; /** Pre-tap value to use */ 158 u16 post_tap; /** Post-tap value to use */ 159 }; 160 161 /** Data structure for Microsemi VSC7224 channel */ 162 struct cvmx_vsc7224_chan { 163 struct cvmx_vsc7224_chan *next, *prev; /** Used for linking */ 164 int ipd_port; /** IPD port this channel belongs to */ 165 int xiface; /** xinterface of SFP */ 166 int index; /** Port index of SFP */ 167 int lane; /** Lane on port */ 168 int of_offset; /** Offset of channel info in dt */ 169 bool is_tx; /** True if is transmit channel */ 170 bool maintap_disable; /** True to disable the main tap */ 171 bool pretap_disable; /** True to disable pre-tap */ 172 bool posttap_disable; /** True to disable post-tap */ 173 int num_taps; /** Number of tap values */ 174 /** (Q)SFP attached to this channel */ 175 struct cvmx_fdt_sfp_info *sfp_info; 176 struct cvmx_vsc7224 *vsc7224; /** Pointer to parent */ 177 /** Tap values for various lengths, must be at the end */ 178 struct cvmx_vsc7224_tap taps[0]; 179 }; 180 181 /** Data structure for Microsemi VSC7224 reclocking chip */ 182 struct cvmx_vsc7224 { 183 const char *name; /** Name */ 184 /** Pointer to cannel data */ 185 struct cvmx_vsc7224_chan *channel[4]; 186 /** I2C bus device is connected to */ 187 struct cvmx_fdt_i2c_bus_info *i2c_bus; 188 /** Address of VSC7224 on i2c bus */ 189 int i2c_addr; 190 struct gpio_desc los_gpio; /** LoS GPIO pin */ 191 struct gpio_desc reset_gpio; /** Reset GPIO pin */ 192 int of_offset; /** Offset in device tree */ 193 }; 194 195 /** Data structure for Avago AVSP5410 gearbox phy */ 196 struct cvmx_avsp5410 { 197 const char *name; /** Name */ 198 /** I2C bus device is connected to */ 199 struct cvmx_fdt_i2c_bus_info *i2c_bus; 200 /** Address of AVSP5410 on i2c bus */ 201 int i2c_addr; 202 int of_offset; /** Offset in device tree */ 203 int ipd_port; /** IPD port this phy belongs to */ 204 int xiface; /** xinterface of SFP */ 205 int index; /** Port index of SFP */ 206 u64 prev_temp; /** Previous temparature recorded on Phy Core */ 207 u64 prev_temp_mins; /** Mininutes when the prev temp check is done */ 208 /** (Q)SFP attached to this phy */ 209 struct cvmx_fdt_sfp_info *sfp_info; 210 }; 211 212 struct cvmx_cs4343_info; 213 214 /** 215 * @INTERNAL 216 * 217 * Data structure containing Inphi CS4343 slice information 218 */ 219 struct cvmx_cs4343_slice_info { 220 const char *name; /** Name of this slice in device tree */ 221 struct cvmx_cs4343_info *mphy; /** Pointer to mphy cs4343 */ 222 struct cvmx_phy_info *phy_info; 223 int of_offset; /** Offset in device tree */ 224 int slice_no; /** Slice number */ 225 int reg_offset; /** Offset for this slice */ 226 u16 sr_stx_cmode_res; /** See Rainier device tree */ 227 u16 sr_stx_drv_lower_cm; /** See Rainier device tree */ 228 u16 sr_stx_level; /** See Rainier device tree */ 229 u16 sr_stx_pre_peak; /** See Rainier device tree */ 230 u16 sr_stx_muxsubrate_sel; /** See Rainier device tree */ 231 u16 sr_stx_post_peak; /** See Rainier device tree */ 232 u16 cx_stx_cmode_res; /** See Rainier device tree */ 233 u16 cx_stx_drv_lower_cm; /** See Rainier device tree */ 234 u16 cx_stx_level; /** See Rainier device tree */ 235 u16 cx_stx_pre_peak; /** See Rainier device tree */ 236 u16 cx_stx_muxsubrate_sel; /** See Rainier device tree */ 237 u16 cx_stx_post_peak; /** See Rainier device tree */ 238 u16 basex_stx_cmode_res; /** See Rainier device tree */ 239 u16 basex_stx_drv_lower_cm; /** See Rainier device tree */ 240 u16 basex_stx_level; /** See Rainier device tree */ 241 u16 basex_stx_pre_peak; /** See Rainier device tree */ 242 u16 basex_stx_muxsubrate_sel; /** See Rainier device tree */ 243 u16 basex_stx_post_peak; /** See Rainier device tree */ 244 int link_gpio; /** Link LED gpio pin number, -1 if none */ 245 int error_gpio; /** Error LED GPIO pin or -1 if none */ 246 int los_gpio; /** LoS input GPIO or -1 if none */ 247 bool los_inverted; /** True if LoS input is inverted */ 248 bool link_inverted; /** True if link output is inverted */ 249 bool error_inverted; /** True if error output is inverted */ 250 }; 251 252 /** 253 * @INTERNAL 254 * 255 * Data structure for Cortina/Inphi CS4343 device 256 */ 257 struct cvmx_cs4343_info { 258 const char *name; /** Name of Inphi/Cortina CS4343 in DT */ 259 struct cvmx_phy_info *phy_info; 260 struct cvmx_cs4343_slice_info slice[4]; /** Slice information */ 261 int of_offset; 262 }; 263 264 /** 265 * @INTERNAL 266 * This data structure is used to hold PHY information and is subject to change. 267 * Please do not use this data structure directly. 268 * 269 * NOTE: The U-Boot OCTEON Ethernet drivers depends on this data structure for 270 * the mux support. 271 */ 272 typedef struct cvmx_phy_info { 273 int phy_addr; /** MDIO address of PHY */ 274 int phy_sub_addr; /** Sub-address (i.e. slice), used by Cortina */ 275 int ipd_port; /** IPD port number for the PHY */ 276 /** MDIO bus PHY connected to (even if behind mux) */ 277 int mdio_unit; 278 int direct_connect; /** 1 if PHY is directly connected */ 279 int gpio[CVMX_PHY_MUX_MAX_GPIO]; /** GPIOs used to control mux, -1 if not used */ 280 281 /** Type of GPIO. It can be a local OCTEON GPIO or a TWSI GPIO */ 282 cvmx_phy_gpio_type_t gpio_type[CVMX_PHY_MUX_MAX_GPIO]; 283 284 /** Address of TWSI GPIO */ 285 int cvmx_gpio_twsi[CVMX_PHY_MUX_MAX_GPIO]; 286 287 /** Value to put into the GPIO lines to select MDIO bus */ 288 int gpio_value; 289 int gpio_parent_mux_twsi; /** -1 if not used, parent TWSI mux for ebb6600 */ 290 int gpio_parent_mux_select; /** selector to use on parent TWSI mux */ 291 cvmx_phy_type_t phy_type; /** Type of PHY */ 292 cvmx_phy_mux_type_t mux_type; /** Type of MDIO mux */ 293 int mux_twsi_addr; /** Address of the MDIO mux */ 294 cvmx_phy_host_mode_t host_mode; /** Used by Cortina PHY */ 295 void *phydev; /** Pointer to parent phy device */ 296 int fdt_offset; /** Node in flat device tree */ 297 int phy_i2c_bus; /** I2C bus for reclocking chips */ 298 int phy_i2c_addr; /** I2C address of reclocking chip */ 299 int num_vsc7224; /** Number of Microsemi VSC7224 devices */ 300 struct cvmx_vsc7224 *vsc7224; /** Info for VSC7224 devices */ 301 /** SFP/QSFP descriptor */ 302 struct cvmx_fdt_sfp_info *sfp_info; 303 /** CS4343 slice information for SGMII/XFI. This is NULL in XLAUI mode */ 304 struct cvmx_cs4343_slice_info *cs4343_slice_info; 305 /** CS4343 mphy information for XLAUI */ 306 struct cvmx_cs4343_info *cs4343_info; 307 /** Pointer to function to return link information */ 308 cvmx_helper_link_info_t (*link_function)(struct cvmx_phy_info *phy_info); 309 /** 310 * If there are LEDs driven by GPIO lines instead of by a PHY device 311 * then they are described here, otherwise gpio_leds should be NULL. 312 */ 313 struct cvmx_phy_gpio_leds *gpio_leds; 314 } cvmx_phy_info_t; 315 316 /* Fake IPD port, the RGMII/MII interface may use different PHY, use this 317 macro to return appropriate MIX address to read the PHY. */ 318 #define CVMX_HELPER_BOARD_MGMT_IPD_PORT -10 319 320 /** 321 * Return the MII PHY address associated with the given IPD 322 * port. A result of -1 means there isn't a MII capable PHY 323 * connected to this port. On chips supporting multiple MII 324 * busses the bus number is encoded in bits <15:8>. 325 * 326 * This function must be modified for every new Octeon board. 327 * Internally it uses switch statements based on the cvmx_sysinfo 328 * data to determine board types and revisions. It relies on the 329 * fact that every Octeon board receives a unique board type 330 * enumeration from the bootloader. 331 * 332 * @param ipd_port Octeon IPD port to get the MII address for. 333 * 334 * Return: MII PHY address and bus number or -1. 335 */ 336 int cvmx_helper_board_get_mii_address(int ipd_port); 337 338 /** 339 * This function as a board specific method of changing the PHY 340 * speed, duplex, and autonegotiation. This programs the PHY and 341 * not Octeon. This can be used to force Octeon's links to 342 * specific settings. 343 * 344 * @param phy_addr The address of the PHY to program 345 * @param link_flags 346 * Flags to control autonegotiation. Bit 0 is autonegotiation 347 * enable/disable to maintain backward compatibility. 348 * @param link_info Link speed to program. If the speed is zero and autonegotiation 349 * is enabled, all possible negotiation speeds are advertised. 350 * 351 * Return: Zero on success, negative on failure 352 */ 353 int cvmx_helper_board_link_set_phy(int phy_addr, 354 cvmx_helper_board_set_phy_link_flags_types_t link_flags, 355 cvmx_helper_link_info_t link_info); 356 357 /** 358 * @INTERNAL 359 * This function is the board specific method of determining an 360 * ethernet ports link speed. Most Octeon boards have Marvell PHYs 361 * and are handled by the fall through case. This function must be 362 * updated for boards that don't have the normal Marvell PHYs. 363 * 364 * This function must be modified for every new Octeon board. 365 * Internally it uses switch statements based on the cvmx_sysinfo 366 * data to determine board types and revisions. It relies on the 367 * fact that every Octeon board receives a unique board type 368 * enumeration from the bootloader. 369 * 370 * @param ipd_port IPD input port associated with the port we want to get link 371 * status for. 372 * 373 * Return: The ports link status. If the link isn't fully resolved, this must 374 * return zero. 375 */ 376 cvmx_helper_link_info_t __cvmx_helper_board_link_get(int ipd_port); 377 378 /** 379 * @INTERNAL 380 * This function is called by cvmx_helper_interface_probe() after it 381 * determines the number of ports Octeon can support on a specific 382 * interface. This function is the per board location to override 383 * this value. It is called with the number of ports Octeon might 384 * support and should return the number of actual ports on the 385 * board. 386 * 387 * This function must be modified for every new Octeon board. 388 * Internally it uses switch statements based on the cvmx_sysinfo 389 * data to determine board types and revisions. It relies on the 390 * fact that every Octeon board receives a unique board type 391 * enumeration from the bootloader. 392 * 393 * @param interface Interface to probe 394 * @param supported_ports 395 * Number of ports Octeon supports. 396 * 397 * Return: Number of ports the actual board supports. Many times this will 398 * simple be "support_ports". 399 */ 400 int __cvmx_helper_board_interface_probe(int interface, int supported_ports); 401 402 /** 403 * @INTERNAL 404 * Enable packet input/output from the hardware. This function is 405 * called after by cvmx_helper_packet_hardware_enable() to 406 * perform board specific initialization. For most boards 407 * nothing is needed. 408 * 409 * @param interface Interface to enable 410 * 411 * Return: Zero on success, negative on failure 412 */ 413 int __cvmx_helper_board_hardware_enable(int interface); 414 415 /** 416 * @INTERNAL 417 * Gets the clock type used for the USB block based on board type. 418 * Used by the USB code for auto configuration of clock type. 419 * 420 * Return: USB clock type enumeration 421 */ 422 cvmx_helper_board_usb_clock_types_t __cvmx_helper_board_usb_get_clock_type(void); 423 424 /** 425 * @INTERNAL 426 * Adjusts the number of available USB ports on Octeon based on board 427 * specifics. 428 * 429 * @param supported_ports expected number of ports based on chip type; 430 * 431 * 432 * Return: number of available usb ports, based on board specifics. 433 * Return value is supported_ports if function does not 434 * override. 435 */ 436 int __cvmx_helper_board_usb_get_num_ports(int supported_ports); 437 438 /** 439 * @INTERNAL 440 * Returns if a port is present on an interface 441 * 442 * @param fdt_addr - address fo flat device tree 443 * @param ipd_port - IPD port number 444 * 445 * Return: 1 if port is present, 0 if not present, -1 if error 446 */ 447 int __cvmx_helper_board_get_port_from_dt(void *fdt_addr, int ipd_port); 448 449 /** 450 * Return the host mode for the PHY. Currently only the Cortina CS4321 PHY 451 * needs this. 452 * 453 * @param ipd_port - ipd port number to get the host mode for 454 * 455 * Return: host mode for phy 456 */ 457 cvmx_phy_host_mode_t cvmx_helper_board_get_phy_host_mode(int ipd_port); 458 459 /** 460 * @INTERNAL 461 * This function outputs the cvmx_phy_info_t data structure for the specified 462 * port. 463 * 464 * @param[out] - phy_info - phy info data structure 465 * @param ipd_port - port to get phy info for 466 * 467 * Return: 0 for success, -1 if info not available 468 * 469 * NOTE: The phy_info data structure is subject to change. 470 */ 471 int cvmx_helper_board_get_phy_info(cvmx_phy_info_t *phy_info, int ipd_port); 472 473 /** 474 * @INTERNAL 475 * Parse the device tree and set whether a port is valid or not. 476 * 477 * @param fdt_addr Pointer to device tree 478 * 479 * Return: 0 for success, -1 on error. 480 */ 481 int __cvmx_helper_parse_bgx_dt(const void *fdt_addr); 482 483 /** 484 * @INTERNAL 485 * Parse the device tree and set whether a port is valid or not. 486 * 487 * @param fdt_addr Pointer to device tree 488 * 489 * Return: 0 for success, -1 on error. 490 */ 491 int __cvmx_helper_parse_bgx_rgmii_dt(const void *fdt_addr); 492 493 /** 494 * @INTERNAL 495 * Updates any GPIO link LEDs if present 496 * 497 * @param xiface Interface number 498 * @param index Port index 499 * @param result Link status result 500 */ 501 void cvmx_helper_update_link_led(int xiface, int index, cvmx_helper_link_info_t result); 502 /** 503 * Update the RX activity LED for the specified interface and port index 504 * 505 * @param xiface Interface number 506 * @param index Port index 507 * @parma check_time True if we should bail out before the polling interval 508 */ 509 void cvmx_update_rx_activity_led(int xiface, int index, bool check_time); 510 511 /** 512 * @INTERNAL 513 * Figure out which mod_abs changed function to use based on the phy type 514 * 515 * @param xiface xinterface number 516 * @param index port index on interface 517 * 518 * Return: 0 for success, -1 on error 519 * 520 * This function figures out the proper mod_abs_changed function to use and 521 * registers the appropriate function. This should be called after the device 522 * tree has been fully parsed for the given port as well as after all SFP 523 * slots and any Microsemi VSC7224 devices have been parsed in the device tree. 524 */ 525 int cvmx_helper_phy_register_mod_abs_changed(int xiface, int index); 526 527 /** 528 * @INTERNAL 529 * Return loss of signal 530 * 531 * @param xiface xinterface number 532 * @param index port index on interface 533 * 534 * Return: 0 if signal present, 1 if loss of signal. 535 * 536 * @NOTE: A result of 0 is possible in some cases where the signal is 537 * not present. 538 * 539 * This is for use with __cvmx_qlm_rx_equilization 540 */ 541 int __cvmx_helper_get_los(int xiface, int index); 542 543 /** 544 * Given the address of the MDIO registers, output the CPU node and MDIO bus 545 * 546 * @param addr 64-bit address of MDIO registers (from device tree) 547 * @param[out] node CPU node number (78xx) 548 * @param[out] bus MDIO bus number 549 */ 550 void __cvmx_mdio_addr_to_node_bus(u64 addr, int *node, int *bus); 551 552 /** 553 * Turn on the error LED 554 * 555 * @param leds LEDs belonging to port 556 * @param error true to turn on LED, false to turn off 557 */ 558 void cvmx_helper_leds_show_error(struct cvmx_phy_gpio_leds *leds, bool error); 559 560 #endif /* __CVMX_HELPER_BOARD_H__ */ 561