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Searched refs:gate_bus_cdrex (Results 1 – 2 of 2) sorted by relevance

/arch/arm/mach-exynos/
A Ddmc_init_ddr3.c636 val = readl(&clk->gate_bus_cdrex); in ddr3_mem_ctrl_init()
638 writel(val & ~0x1, &clk->gate_bus_cdrex); in ddr3_mem_ctrl_init()
640 writel(val, &clk->gate_bus_cdrex); in ddr3_mem_ctrl_init()
648 writel(val & ~0x2, &clk->gate_bus_cdrex); in ddr3_mem_ctrl_init()
650 writel(val, &clk->gate_bus_cdrex); in ddr3_mem_ctrl_init()
/arch/arm/mach-exynos/include/mach/
A Dclock.h1254 unsigned int gate_bus_cdrex; member

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