Home
last modified time | relevance | path

Searched refs:gcr (Results 1 – 19 of 19) sorted by relevance

/arch/arm/mach-npcm/npcm8xx/
A Dreset.c21 struct npcm_gcr *gcr = (struct npcm_gcr *)NPCM_GCR_BA; in reset_misc() local
23 clrbits_le32(&gcr->intcr2, INTCR2_WDC); in reset_misc()
28 struct npcm_gcr *gcr = (struct npcm_gcr *)NPCM_GCR_BA; in npcm_get_reset_status() local
31 val = readl(&gcr->ressr); in npcm_get_reset_status()
33 val = readl(&gcr->intcr2); in npcm_get_reset_status()
A Dcpu.c37 struct npcm_gcr *gcr = (struct npcm_gcr *)NPCM_GCR_BA; in print_cpuinfo() local
43 val = readl(&gcr->mdlr); in print_cpuinfo()
62 val = readl(&gcr->pdid); in print_cpuinfo()
/arch/arm/dts/
A Dnuvoton-common-npcm8xx.dtsi143 syscon = <&gcr>;
237 syscon = <&gcr>;
246 syscon = <&gcr>;
255 syscon = <&gcr>;
268 syscon = <&gcr>;
282 syscon = <&gcr>;
296 syscon = <&gcr>;
310 syscon = <&gcr>;
324 syscon = <&gcr>;
338 syscon = <&gcr>;
[all …]
A Dnuvoton-npcm7xx-u-boot.dtsi121 syscon-gcr = <&gcr>;
145 syscon = <&gcr>;
A Dnuvoton-common-npcm7xx.dtsi89 gcr: gcr@800000 { label
90 compatible = "nuvoton,npcm750-gcr", "syscon", "simple-mfd";
561 syscon-gcr = <&gcr>;
A Dnuvoton-npcm8xx-u-boot.dtsi131 syscon = <&gcr>;
415 syscon-gcr = <&gcr>;
/arch/arm/mach-npcm/npcm7xx/
A Dcpu.c13 struct npcm_gcr *gcr = (struct npcm_gcr *)NPCM_GCR_BA; in print_cpuinfo() local
16 mdlr = readl(&gcr->mdlr); in print_cpuinfo()
35 id = readl(&gcr->pdid); in print_cpuinfo()
/arch/powerpc/cpu/mpc85xx/
A Dinterrupts.c39 out_be32(&pic->gcr, MPC85xx_PICGCR_RST); in interrupt_init_cpu()
40 while (in_be32(&pic->gcr) & MPC85xx_PICGCR_RST) in interrupt_init_cpu()
42 out_be32(&pic->gcr, MPC85xx_PICGCR_M); in interrupt_init_cpu()
43 in_be32(&pic->gcr); in interrupt_init_cpu()
/arch/arm/mach-sunxi/
A Ddram_sun50i_h6.c355 writel(0x0, &mctl_phy->dx[2].gcr[0]); in mctl_com_init()
356 writel(0x0, &mctl_phy->dx[3].gcr[0]); in mctl_com_init()
447 clrsetbits_le32(&mctl_phy->dx[i].gcr[0], 0xe00, 0x800); in mctl_channel_init()
449 clrsetbits_le32(&mctl_phy->dx[i].gcr[2], 0xffff, 0x5555); in mctl_channel_init()
451 clrsetbits_le32(&mctl_phy->dx[i].gcr[3], 0x3030, 0x1010); in mctl_channel_init()
512 writel(0x00000909, &mctl_phy->dx[i].gcr[5]); in mctl_channel_init()
519 clrsetbits_le32(&mctl_phy->dx[i].gcr[2], 0xffff, val); in mctl_channel_init()
525 clrsetbits_le32(&mctl_phy->dx[i].gcr[3], 0x3030, val); in mctl_channel_init()
534 clrbits_le32(&mctl_phy->dx[i].gcr[3], ~0x3ffff); in mctl_channel_init()
A Ddram_sun9i.c692 debug("DX2GCR0 reset: 0x%x\n", readl(&mctl_phy->dx[2].gcr[0])); in mctl_channel_init()
693 writel(0x7C000285, &mctl_phy->dx[2].gcr[0]); in mctl_channel_init()
694 writel(0x7C000285, &mctl_phy->dx[3].gcr[0]); in mctl_channel_init()
707 clrbits_le32(&mctl_phy->dx[lane].gcr[2], 0xffff); in mctl_channel_init()
708 clrbits_le32(&mctl_phy->dx[lane].gcr[3], in mctl_channel_init()
715 clrsetbits_le32(&mctl_phy->dx[lane].gcr[2], 0xffff, in mctl_channel_init()
718 setbits_le32(&mctl_phy->dx[lane].gcr[3], in mctl_channel_init()
721 setbits_le32(&mctl_phy->dx[lane].gcr[3], in mctl_channel_init()
A Ddram_sunxi_dw.c514 clrsetbits_le32(&mctl_ctl->dx[i].gcr, clearmask, setmask); in mctl_channel_init()
554 writel(0x0, &mctl_ctl->dx[2].gcr); in mctl_channel_init()
555 writel(0x0, &mctl_ctl->dx[3].gcr); in mctl_channel_init()
557 writel(0x0, &mctl_ctl->dx[1].gcr); in mctl_channel_init()
609 writel(0x0, &mctl_ctl->dx[2].gcr); in mctl_channel_init()
610 writel(0x0, &mctl_ctl->dx[3].gcr); in mctl_channel_init()
615 writel(0x0, &mctl_ctl->dx[1].gcr); in mctl_channel_init()
/arch/arm/include/asm/arch-imx8ulp/
A Dimx-regs.h81 u32 gcr; member
/arch/arm/include/asm/arch-imx9/
A Dimx-regs.h84 u32 gcr; member
/arch/arm/include/asm/arch-sunxi/
A Ddram_sunxi_dw.h140 u32 gcr; /* 0x44 general configuration register */ member
A Ddram_sun9i.h144 u32 gcr[4]; /* DATX8 general configuration register */ member
A Ddram_sun50i_h6.h245 u32 gcr[7]; /* 0x00 */ member
/arch/arm/include/asm/arch-omap3/
A Dcpu.h254 u32 gcr; member
/arch/powerpc/include/asm/
A Dimmap_83xx.h414 u32 gcr; member
A Dimmap_85xx.h640 u32 gcr; /* Global Configuration */ member

Completed in 63 milliseconds