| /arch/powerpc/cpu/mpc8xx/ |
| A D | traps.c | 72 printf("%08lX ", regs->gpr[i]); in show_regs()
81 print_backtrace((unsigned long *)regs->gpr[1]); in _exception()
119 print_backtrace((unsigned long *)regs->gpr[1]); in MachineCheckException()
126 print_backtrace((unsigned long *)regs->gpr[1]); in AlignmentException()
133 print_backtrace((unsigned long *)regs->gpr[1]); in ProgramCheckException()
140 print_backtrace((unsigned long *)regs->gpr[1]); in SoftEmuException()
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| /arch/powerpc/cpu/mpc83xx/ |
| A D | traps.c | 70 printf("%08lX ", regs->gpr[i]); in show_regs()
80 print_backtrace((unsigned long *)regs->gpr[1]); in _exception()
153 print_backtrace((unsigned long *)regs->gpr[1]); in MachineCheckException()
167 print_backtrace((unsigned long *)regs->gpr[1]); in AlignmentException()
178 print_backtrace((unsigned long *)regs->gpr[1]); in ProgramCheckException()
189 print_backtrace((unsigned long *)regs->gpr[1]); in SoftEmuException()
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| /arch/arm/mach-imx/imx9/ |
| A D | clock_root.c | 403 int ccm_shared_gpr_set(u32 gpr, u32 val) in ccm_shared_gpr_set() argument
405 if (gpr >= SHARED_GPR_NUM) in ccm_shared_gpr_set()
408 writel(val, &ccm_reg->clk_shared_gpr[gpr].gpr); in ccm_shared_gpr_set()
413 int ccm_shared_gpr_get(u32 gpr, u32 *val) in ccm_shared_gpr_get() argument
415 if (gpr >= SHARED_GPR_NUM || !val) in ccm_shared_gpr_get()
418 *val = readl(&ccm_reg->clk_shared_gpr[gpr].gpr); in ccm_shared_gpr_get()
423 int ccm_shared_gpr_tz_access(u32 gpr, bool non_secure, bool user_mode, bool lock_tz) in ccm_shared_gpr_tz_access() argument
427 if (gpr >= SHARED_GPR_NUM) in ccm_shared_gpr_tz_access()
430 authen = readl(&ccm_reg->clk_shared_gpr[gpr].authen); in ccm_shared_gpr_tz_access()
436 writel(authen, &ccm_reg->clk_shared_gpr[gpr].authen); in ccm_shared_gpr_tz_access()
|
| /arch/powerpc/cpu/mpc85xx/ |
| A D | traps.c | 106 printf("%08lX ", regs->gpr[i]); in show_regs()
117 print_backtrace((unsigned long *)regs->gpr[1]); in _exception()
186 print_backtrace((unsigned long *)regs->gpr[1]); in MachineCheckException()
208 print_backtrace((unsigned long *)regs->gpr[1]); in AlignmentException()
231 print_backtrace((unsigned long *)regs->gpr[1]); in ProgramCheckException()
276 print_backtrace((unsigned long *)regs->gpr[1]); in ExtIntException()
|
| /arch/microblaze/include/asm/ |
| A D | ptrace.h | 66 microblaze_reg_t gpr[NUM_GPRS]; member
82 #define PT_REGS_SYSCALL(regs) (regs)->gpr[0]
83 #define PT_REGS_SET_SYSCALL(regs, val) ((regs)->gpr[0] = (val))
|
| /arch/arm/mach-imx/imx8m/ |
| A D | clock_imx8mm.c | 841 struct iomuxc_gpr_base_regs *gpr = in imx8mp_eqos_interface_init() local
844 clrbits_le32(&gpr->gpr[1], in imx8mp_eqos_interface_init()
852 setbits_le32(&gpr->gpr[1], in imx8mp_eqos_interface_init()
857 setbits_le32(&gpr->gpr[1], in imx8mp_eqos_interface_init()
866 setbits_le32(&gpr->gpr[1], in imx8mp_eqos_interface_init()
892 struct iomuxc_gpr_base_regs *gpr = in imx8mp_fec_interface_init() local
895 clrbits_le32(&gpr->gpr[1], in imx8mp_fec_interface_init()
902 setbits_le32(&gpr->gpr[1], IOMUXC_GPR_GPR1_GPR_ENET1_TX_CLK_SEL); in imx8mp_fec_interface_init()
908 setbits_le32(&gpr->gpr[1], rgmii_en); in imx8mp_fec_interface_init()
|
| A D | soc.c | 74 struct iomuxc_gpr_base_regs *gpr = in enable_tzc380() local
78 setbits_le32(&gpr->gpr[10], GPR_TZASC_EN); in enable_tzc380()
79 setbits_le32(&gpr->gpr[10], GPR_TZASC_EN_LOCK); in enable_tzc380()
85 setbits_le32(&gpr->gpr[10], GPR_TZASC_ID_SWAP_BYPASS); in enable_tzc380()
91 setbits_le32(&gpr->gpr[10], GPR_TZASC_ID_SWAP_BYPASS_LOCK); in enable_tzc380()
|
| /arch/powerpc/lib/ |
| A D | kgdb.c | 102 kdp->regs[1].val = regs->gpr[SP_REGNUM]; in kgdb_enter()
162 *ptr++ = regs->gpr[i]; in kgdb_getregs()
202 regs->gpr[regno] = *ptr; in kgdb_putreg()
235 regs->gpr[i] = *ptr++; in kgdb_putregs()
|
| /arch/arm/mach-imx/ |
| A D | cache.c | 103 val = readl(&iomux->gpr[11]); in v7_outer_cache_enable()
107 writel(val, &iomux->gpr[11]); in v7_outer_cache_enable()
|
| A D | sata.c | 25 clrsetbits_le32(&iomuxc_regs->gpr[13], in setup_sata()
|
| A D | cpu.c | 322 reg = readl(&iomuxc_regs->gpr[1]); in set_chipselect_size()
346 writel(reg, &iomuxc_regs->gpr[1]); in set_chipselect_size()
|
| /arch/arm/include/asm/arch-imx9/ |
| A D | clock.h | 65 u32 gpr; member
251 int ccm_shared_gpr_set(u32 gpr, u32 val);
252 int ccm_shared_gpr_get(u32 gpr, u32 *val);
253 int ccm_shared_gpr_tz_access(u32 gpr, bool non_secure, bool user_mode, bool lock_tz);
|
| A D | imx-regs.h | 199 u32 gpr[19]; member
|
| /arch/arm/mach-imx/mx6/ |
| A D | soc.c | 789 writel(0xF00000CF, &iomux->gpr[4]); in gpr_init()
792 writel(0x77177717, &iomux->gpr[6]); in gpr_init()
793 writel(0x77177717, &iomux->gpr[7]); in gpr_init()
796 writel(0x007F007F, &iomux->gpr[6]); in gpr_init()
797 writel(0x007F007F, &iomux->gpr[7]); in gpr_init()
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| A D | opos6ul.c | 37 clrsetbits_le32(&iomuxc_regs->gpr[1], IOMUX_GPR1_FEC1_MASK, in setup_fec()
|
| /arch/arm/include/asm/arch-mx27/ |
| A D | gpio.h | 26 u32 gpr; member
|
| /arch/arm/cpu/arm1136/mx31/ |
| A D | generic.c | 136 l = readl(&iomuxc->gpr); in mx31_set_gpr()
142 writel(l, &iomuxc->gpr); in mx31_set_gpr()
|
| /arch/powerpc/include/asm/ |
| A D | ptrace.h | 27 PPC_REG gpr[32]; member
|
| /arch/arm/dts/ |
| A D | imx6qdl.dtsi | 80 gpr = <&gpr>;
187 gpr = <&gpr>;
558 fsl,stop-mode = <&gpr 0x34 28>;
569 fsl,stop-mode = <&gpr 0x34 29>;
907 gpr: iomuxc-gpr@20e0000 { label
908 compatible = "fsl,imx6q-iomuxc-gpr", "syscon", "simple-mfd";
1055 fsl,stop-mode = <&gpr 0x34 27>;
1167 fsl,weim-cs-gpr = <&gpr>;
|
| A D | imx6ul.dtsi | 436 fsl,stop-mode = <&gpr 0x10 1>;
447 fsl,stop-mode = <&gpr 0x10 2>;
541 fsl,stop-mode = <&gpr 0x10 4>;
731 gpr: iomuxc-gpr@20e4000 { label
732 compatible = "fsl,imx6ul-iomuxc-gpr",
733 "fsl,imx6q-iomuxc-gpr", "syscon";
889 fsl,stop-mode = <&gpr 0x10 3>;
976 fsl,weim-cs-gpr = <&gpr>;
|
| A D | imx6sx.dtsi | 142 gpr = <&gpr>;
469 fsl,stop-mode = <&gpr 0x10 1>;
480 fsl,stop-mode = <&gpr 0x10 2>;
839 gpr: iomuxc-gpr@20e4000 { label
840 compatible = "fsl,imx6sx-iomuxc-gpr",
841 "fsl,imx6q-iomuxc-gpr", "syscon";
956 fsl,stop-mode = <&gpr 0x10 3>;
1066 fsl,stop-mode = <&gpr 0x10 4>;
1077 fsl,weim-cs-gpr = <&gpr>;
|
| A D | imx53.dtsi | 466 gpr: iomuxc-gpr@53fa8000 { label
467 compatible = "fsl,imx53-iomuxc-gpr", "syscon";
476 gpr = <&gpr>;
|
| A D | imx7s.dtsi | 508 gpr: iomuxc-gpr@30340000 { label
509 compatible = "fsl,imx7d-iomuxc-gpr",
510 "fsl,imx6q-iomuxc-gpr", "syscon",
1024 fsl,stop-mode = <&gpr 0x10 1>;
1035 fsl,stop-mode = <&gpr 0x10 2>;
1255 fsl,stop-mode = <&gpr 0x10 3>;
|
| /arch/arm/include/asm/arch-mx5/ |
| A D | imx-regs.h | 376 u32 gpr[2]; member
385 u32 gpr[3]; member
|
| /arch/arm/mach-imx/mx7/ |
| A D | soc.c | 190 setbits_le32(&gpr_regs->gpr[0], in imx_enet_mdio_fixup()
|