| /arch/powerpc/cpu/mpc8xxx/ |
| A D | law.c | 39 in_be32(LAWBARL_ADDR(idx)); in get_law_base_addr()
64 in_be32(LAWAR_ADDR(idx)); in set_law()
67 void disable_law(u8 idx) in disable_law() argument
72 set_law_base_addr(idx, 0); in disable_law()
75 in_be32(LAWAR_ADDR(idx)); in disable_law()
103 if (idx >= FSL_HW_NUM_LAWS) in set_next_law()
106 set_law(idx, addr, sz, id); in set_next_law()
108 return idx; in set_next_law()
115 u32 idx; in set_last_law() local
124 if (idx >= FSL_HW_NUM_LAWS) in set_last_law()
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| A D | srio.c | 79 int idx, first, last; in srio_erratum_a004034() local
150 for (idx = first; idx <= last; idx++) in srio_erratum_a004034()
151 clrbits_be32(&srds_regs->lane[idx].gcr0, in srio_erratum_a004034()
157 for (idx = first; idx <= last; idx++) in srio_erratum_a004034()
158 in_be32(&srds_regs->lane[idx].gcr0); in srio_erratum_a004034()
167 for (idx = first; idx <= last; idx++) in srio_erratum_a004034()
168 setbits_be32(&srds_regs->lane[idx].gcr0, in srio_erratum_a004034()
174 for (idx = first; idx <= last; idx++) in srio_erratum_a004034()
175 in_be32(&srds_regs->lane[idx].gcr0); in srio_erratum_a004034()
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| /arch/arm/mach-imx/imx8/ |
| A D | snvs_security_sc.c | 509 u32 idx; in apply_tamper_pin_list_config() local
513 for (idx = 0; idx < size; idx++) { in apply_tamper_pin_list_config()
628 u32 idx = 0; in do_snvs_cfg() local
680 u32 idx = 0; in do_snvs_dgo_cfg() local
716 u32 idx = 0; in do_tamper_pin_cfg() local
751 u32 idx = 0; in do_snvs_clear_status() local
789 u32 idx; in do_snvs_sec_status() local
856 for (idx = 0; idx < ARRAY_SIZE(pads); idx++) { in do_snvs_sec_status()
868 for (idx = 0; idx < ARRAY_SIZE(fuses); idx++) { in do_snvs_sec_status()
880 for (idx = 0; idx < ARRAY_SIZE(snvs); idx++) { in do_snvs_sec_status()
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| A D | ahab.c | 315 u8 idx = 0U; in do_ahab_status() local
327 err = sc_seco_get_event(-1, idx, &event); in do_ahab_status()
329 printf("SECO Event[%u] = 0x%08X\n", idx, event); in do_ahab_status()
332 idx++; in do_ahab_status()
333 err = sc_seco_get_event(-1, idx, &event); in do_ahab_status()
336 if (idx == 0) in do_ahab_status()
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| /arch/mips/mach-octeon/ |
| A D | cvmx-pki-resources.c | 261 int cvmx_pki_mtag_idx_alloc(int node, int idx) in cvmx_pki_mtag_idx_alloc() argument
268 if (idx >= 0) { in cvmx_pki_mtag_idx_alloc()
269 idx = cvmx_reserve_global_resource_range( in cvmx_pki_mtag_idx_alloc()
270 CVMX_GR_TAG_MTAG_IDX(node), idx, idx, 1); in cvmx_pki_mtag_idx_alloc()
271 if (idx == -1) { in cvmx_pki_mtag_idx_alloc()
273 (int)idx); in cvmx_pki_mtag_idx_alloc()
277 idx = cvmx_allocate_global_resource_range( in cvmx_pki_mtag_idx_alloc()
278 CVMX_GR_TAG_MTAG_IDX(node), idx, 1, 1); in cvmx_pki_mtag_idx_alloc()
279 if (idx == -1) { in cvmx_pki_mtag_idx_alloc()
284 return idx; in cvmx_pki_mtag_idx_alloc()
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| /arch/riscv/lib/ |
| A D | setjmp.S | 10 #define STORE_IDX(reg, idx) sd reg, (idx*8)(a0) argument
11 #define LOAD_IDX(reg, idx) ld reg, (idx*8)(a0) argument
13 #define STORE_IDX(reg, idx) sw reg, (idx*4)(a0) argument
14 #define LOAD_IDX(reg, idx) lw reg, (idx*4)(a0) argument
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| A D | crt0_riscv_efi.S | 15 #define SAVE_LONG(reg, idx) sd reg, (idx*SIZE_LONG)(sp) argument
16 #define LOAD_LONG(reg, idx) ld reg, (idx*SIZE_LONG)(sp) argument
27 #define SAVE_LONG(reg, idx) sw reg, (idx*SIZE_LONG)(sp) argument
28 #define LOAD_LONG(reg, idx) lw reg, (idx*SIZE_LONG)(sp) argument
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| /arch/powerpc/cpu/mpc85xx/ |
| A D | fsl_corenet_serdes.c | 64 int idx; member
101 return lanes[lane].idx; in serdes_get_lane_idx()
231 for (idx = first; idx < last; idx++) in __serdes_reset_rx()
241 for (idx = first; idx < last; idx++) in __serdes_reset_rx()
499 int lane, bank, idx; in fsl_serdes_init() local
674 idx = lanes[lane].idx; in fsl_serdes_init()
824 for (idx = 0; idx < SRDS_MAX_BANK; idx++) { in fsl_serdes_init()
825 bank = idx; in fsl_serdes_init()
834 if (idx == 1) in fsl_serdes_init()
836 else if (idx == 2) in fsl_serdes_init()
[all …]
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| A D | tlb.c | 54 mtspr(MAS0, FSL_BOOKE_MAS0(1, idx, 0)); in read_tlbcam_entry()
87 static inline void use_tlb_cam(u8 idx) in use_tlb_cam() argument
89 int i = idx / 32; in use_tlb_cam()
90 int bit = idx % 32; in use_tlb_cam()
97 int i = idx / 32; in free_tlb_cam()
98 int bit = idx % 32; in free_tlb_cam()
123 u32 idx; in find_free_tlbcam() local
128 if (idx != 32) in find_free_tlbcam()
132 idx += i * 32; in find_free_tlbcam()
134 if (idx >= CONFIG_SYS_NUM_TLBCAMS) in find_free_tlbcam()
[all …]
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| /arch/x86/cpu/intel_common/ |
| A D | pch.c | 9 u32 pch_common_sir_read(struct udevice *dev, int idx) in pch_common_sir_read() argument
13 dm_pci_write_config32(dev, SATA_SIRI, idx); in pch_common_sir_read()
19 void pch_common_sir_write(struct udevice *dev, int idx, u32 value) in pch_common_sir_write() argument
21 dm_pci_write_config32(dev, SATA_SIRI, idx); in pch_common_sir_write()
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| /arch/arm/mach-socfpga/ |
| A D | spl_soc64.c | 57 int idx = 0; in board_boot_order() local
85 if (idx >= length) { in board_boot_order()
106 spl_boot_list[idx] = boot_device; in board_boot_order()
107 debug("%s: spl_boot_list[%d] = %u\n", __func__, idx, in board_boot_order()
108 spl_boot_list[idx]); in board_boot_order()
109 idx++; in board_boot_order()
112 if (idx == 0) { in board_boot_order()
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| A D | scan_manager.c | 142 unsigned int rem, idx = 0; in scan_mgr_io_scan_chain_prg() local
179 ret = scan_mgr_jtag_insn_data(0x0, &iocsr_scan_chain[idx], rem); in scan_mgr_io_scan_chain_prg()
183 idx += 4; in scan_mgr_io_scan_chain_prg()
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| /arch/arm/mach-apple/ |
| A D | sart.c | 23 #define APPLE_SART2_CONFIG(idx) (0x00 + 4 * (idx)) argument
29 #define APPLE_SART2_PADDR(idx) (0x40 + 4 * (idx)) argument
33 #define APPLE_SART3_CONFIG(idx) (0x00 + 4 * (idx)) argument
35 #define APPLE_SART3_PADDR(idx) (0x40 + 4 * (idx)) argument
38 #define APPLE_SART3_SIZE(idx) (0x80 + 4 * (idx)) argument
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| /arch/arm/mach-renesas/ |
| A D | cpu_info.c | 91 static const u8 *get_cpu_name(int idx) in get_cpu_name() argument
95 return cpu_name ? cpu_name : renesas_cpuinfo[idx].cpu_name; in get_cpu_name()
101 int i, idx = renesas_cpuinfo_idx(); in arch_misc_init() local
102 const u8 *cpu_name = get_cpu_name(idx); in arch_misc_init()
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| /arch/arm/mach-at91/include/mach/ |
| A D | atmel_usba_udc.h | 12 #define EP(nam, idx, maxpkt, maxbk, dma, isoc) \ argument
13 [idx] = { \
15 .index = idx, \
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| /arch/arm/mach-mvebu/armada3700/ |
| A D | cpu.c | 306 u32 idx, u32 val) in fdt_setprop_inplace_u32_partial() argument
312 idx * sizeof(u32), in fdt_setprop_inplace_u32_partial()
388 int idx; in a3700_fdt_fix_pcie_regions() local
391 idx = i + pci_cells + cpu_cells - 1; in a3700_fdt_fix_pcie_regions()
392 cpu_addr = fdt32_to_cpu(ranges[idx]); in a3700_fdt_fix_pcie_regions()
393 ret = fdt_setprop_inplace_u32_partial(blob, node, "ranges", idx, in a3700_fdt_fix_pcie_regions()
399 idx = i + pci_cells - 1; in a3700_fdt_fix_pcie_regions()
400 pci_addr = ((u64)fdt32_to_cpu(ranges[idx - 1]) << 32) | in a3700_fdt_fix_pcie_regions()
401 fdt32_to_cpu(ranges[idx]); in a3700_fdt_fix_pcie_regions()
405 ret = fdt_setprop_inplace_u32_partial(blob, node, "ranges", idx, in a3700_fdt_fix_pcie_regions()
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| /arch/powerpc/include/asm/ |
| A D | fsl_law.h | 14 #define SET_LAW_ENTRY(idx, a, sz, trgt) \ argument
15 { .index = idx, .addr = a, .size = sz, .trgt_id = trgt }
129 extern void set_law(u8 idx, phys_addr_t addr, enum law_size sz, enum law_trgt_if id);
140 extern void disable_law(u8 idx);
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| /arch/x86/include/asm/ |
| A D | pch_common.h | 44 u32 pch_common_sir_read(struct udevice *dev, int idx);
53 void pch_common_sir_write(struct udevice *dev, int idx, u32 value);
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| /arch/mips/mach-octeon/include/mach/ |
| A D | cvmx-pki-resources.h | 145 int cvmx_pki_mtag_idx_alloc(int node, int idx);
153 int cvmx_pki_mtag_idx_free(int node, int idx);
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| /arch/arm/dts/ |
| A D | synquacer-sc2a11-caches.dtsi | 18 #define __L2(idx) \ argument
19 L2_##idx: l2-cache##idx { \
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| /arch/arm/mach-rockchip/ |
| A D | spl-boot-order.c | 109 int idx = 0; in board_boot_order() local
155 spl_boot_list[idx++] = boot_device; in board_boot_order()
159 if (idx == 0) in board_boot_order()
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| /arch/sandbox/include/asm/ |
| A D | i2c.h | 26 int idx; member
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| /arch/arm/cpu/armv8/fsl-layerscape/ |
| A D | ls1028_ids.c | 85 const char *name, uint32_t idx, u32 val) in fdt_setprop_inplace_idx_u32() argument
90 idx * sizeof(val), &val, in fdt_setprop_inplace_idx_u32()
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| /arch/arm/cpu/armv8/ |
| A D | cache_v8.c | 132 u64 idx; in find_pte() local
148 idx = (addr >> level2shift(i)) & 0x1FF; in find_pte()
149 pte += idx; in find_pte()
150 debug("idx=%llx PTE %p at level %d: %llx\n", idx, pte, i, *pte); in find_pte()
306 int i, idx; in map_range() local
308 idx = (virt >> level2shift(level)) & (MAX_PTE_ENTRIES - 1); in map_range()
309 for (i = idx; size; i++) { in map_range()
385 int i, idx; in count_range() local
387 idx = (virt >> level2shift(level)) & (MAX_PTE_ENTRIES - 1); in count_range()
388 for (i = idx; size; i++) { in count_range()
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| /arch/arm/mach-imx/ |
| A D | hab.c | 412 u32 idx = 0; in get_idx() local
415 while (idx < size) { in get_idx()
416 element = list[idx]; in get_idx()
418 return idx; in get_idx()
419 ++idx; in get_idx()
421 return idx; in get_idx()
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