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/arch/arm/dts/
A Dexynos4x12-pinctrl.dtsi21 interrupt-controller;
22 #interrupt-cells = <2>;
29 interrupt-controller;
30 #interrupt-cells = <2>;
37 interrupt-controller;
45 interrupt-controller;
53 interrupt-controller;
61 interrupt-controller;
69 interrupt-controller;
77 interrupt-controller;
[all …]
A Dexynos5250-pinctrl.dtsi21 interrupt-controller;
22 #interrupt-cells = <2>;
29 interrupt-controller;
30 #interrupt-cells = <2>;
37 interrupt-controller;
45 interrupt-controller;
53 interrupt-controller;
61 interrupt-controller;
69 interrupt-controller;
77 interrupt-controller;
[all …]
A Dexynos4210-pinctrl.dtsi23 interrupt-controller;
24 #interrupt-cells = <2>;
31 interrupt-controller;
39 interrupt-controller;
47 interrupt-controller;
55 interrupt-controller;
63 interrupt-controller;
71 interrupt-controller;
79 interrupt-controller;
87 interrupt-controller;
[all …]
A Dexynos54xx-pinctrl.dtsi23 interrupt-controller;
24 #interrupt-cells = <2>;
31 interrupt-controller;
33 #interrupt-cells = <2>;
42 interrupt-controller;
53 interrupt-controller;
61 interrupt-controller;
72 interrupt-controller;
80 interrupt-controller;
88 interrupt-controller;
[all …]
A Darmada-385.dtsi72 interrupt-names = "intx";
74 #interrupt-cells = <1>;
89 interrupt-controller;
90 #interrupt-cells = <1>;
103 #interrupt-cells = <1>;
118 interrupt-controller;
119 #interrupt-cells = <1>;
132 #interrupt-cells = <1>;
147 interrupt-controller;
164 #interrupt-cells = <1>;
[all …]
A Dimxrt1170.dtsi112 interrupt-controller;
123 interrupt-controller;
134 interrupt-controller;
145 interrupt-controller;
156 interrupt-controller;
167 interrupt-controller;
178 interrupt-controller;
189 interrupt-controller;
200 interrupt-controller;
211 interrupt-controller;
[all …]
A Dexynos4.dtsi25 #interrupt-cells = <2>;
26 interrupt-controller;
32 #interrupt-cells = <3>;
33 interrupt-controller;
73 interrupt-parent = <&gic>;
82 interrupt-parent = <&gic>;
91 interrupt-parent = <&gic>;
100 interrupt-parent = <&gic>;
109 interrupt-parent = <&gic>;
118 interrupt-parent = <&gic>;
[all …]
A Dvf500.dtsi6 #include <dt-bindings/interrupt-controller/arm-gic.h>
28 intc: interrupt-controller@40003000 {
30 #interrupt-cells = <3>;
31 interrupt-controller;
32 interrupt-parent = <&intc>;
41 interrupt-parent = <&intc>;
50 interrupt-affinity = <&a5_cpu>;
59 interrupt-parent = <&intc>;
A Darmada-xp-mv78460.dtsi122 #interrupt-cells = <1>;
141 #interrupt-cells = <1>;
160 #interrupt-cells = <1>;
179 #interrupt-cells = <1>;
198 #interrupt-cells = <1>;
217 #interrupt-cells = <1>;
236 #interrupt-cells = <1>;
255 #interrupt-cells = <1>;
317 interrupt-controller;
332 interrupt-controller;
[all …]
A Dhpe-gxp.dtsi62 vic0: interrupt-controller@eff0000 {
65 interrupt-controller;
66 #interrupt-cells = <1>;
72 interrupt-controller;
73 #interrupt-cells = <1>;
80 interrupt-parent = <&vic0>;
89 interrupt-parent = <&vic0>;
98 interrupt-parent = <&vic0>;
107 interrupt-parent = <&vic0>;
114 interrupt-parent = <&vic0>;
[all …]
A Darmada-xp-mv78260.dtsi101 #interrupt-cells = <1>;
120 #interrupt-cells = <1>;
139 #interrupt-cells = <1>;
158 #interrupt-cells = <1>;
177 #interrupt-cells = <1>;
196 #interrupt-cells = <1>;
215 #interrupt-cells = <1>;
234 #interrupt-cells = <1>;
277 interrupt-controller;
292 interrupt-controller;
[all …]
A Dmt8518.dtsi10 #include <dt-bindings/interrupt-controller/irq.h>
15 interrupt-parent = <&sysirq>;
27 gic: interrupt-controller@0c000000 {
29 #interrupt-cells = <3>;
30 interrupt-parent = <&gic>;
31 interrupt-controller;
38 sysirq: interrupt-controller@10200a80 {
40 interrupt-controller;
41 #interrupt-cells = <3>;
42 interrupt-parent = <&gic>;
[all …]
A Dt8103.dtsi92 interrupt-parent = <&aic>;
233 #interrupt-cells = <3>;
234 interrupt-controller;
256 interrupt-controller;
257 #interrupt-cells = <2>;
326 interrupt-controller;
327 #interrupt-cells = <2>;
362 interrupt-controller;
405 interrupt-controller;
580 interrupt-controller;
[all …]
A Darmada-xp-mv78230.dtsi86 #interrupt-cells = <1>;
90 interrupt-map-mask = <0 0 0 0>;
105 #interrupt-cells = <1>;
109 interrupt-map-mask = <0 0 0 0>;
124 #interrupt-cells = <1>;
143 #interrupt-cells = <1>;
162 #interrupt-cells = <1>;
186 interrupt-controller;
187 #interrupt-cells = <2>;
201 interrupt-controller;
[all …]
A Dmt8516.dtsi9 #include <dt-bindings/interrupt-controller/irq.h>
14 interrupt-parent = <&sysirq>;
76 gic: interrupt-controller@10310000 {
78 interrupt-controller;
79 #interrupt-cells = <3>;
80 interrupt-parent = <&gic>;
89 sysirq: interrupt-controller@10200620 {
91 interrupt-controller;
92 #interrupt-cells = <3>;
93 interrupt-parent = <&gic>;
[all …]
A Dhi3660.dtsi14 interrupt-parent = <&gic>;
290 #interrupt-cells = <3>;
291 interrupt-controller;
596 interrupt-controller;
609 interrupt-controller;
622 interrupt-controller;
635 interrupt-controller;
648 interrupt-controller;
661 interrupt-controller;
674 interrupt-controller;
[all …]
/arch/riscv/dts/
A Dae350_32.dts44 #interrupt-cells = <1>;
45 interrupt-controller;
65 #interrupt-cells = <1>;
66 interrupt-controller;
86 #interrupt-cells = <1>;
87 interrupt-controller;
108 interrupt-controller;
139 #interrupt-cells = <2>;
140 interrupt-controller;
151 #interrupt-cells = <1>;
[all …]
A Dae350_64.dts44 #interrupt-cells = <1>;
45 interrupt-controller;
65 #interrupt-cells = <1>;
66 interrupt-controller;
86 #interrupt-cells = <1>;
87 interrupt-controller;
108 interrupt-controller;
139 #interrupt-cells = <2>;
140 interrupt-controller;
151 #interrupt-cells = <2>;
[all …]
A Dfu740-c000.dtsi36 #interrupt-cells = <1>;
38 interrupt-controller;
60 #interrupt-cells = <1>;
62 interrupt-controller;
84 #interrupt-cells = <1>;
86 interrupt-controller;
110 interrupt-controller;
134 interrupt-controller;
144 #interrupt-cells = <1>;
149 interrupt-controller;
[all …]
A Dfu540-c000.dtsi35 #interrupt-cells = <1>;
37 interrupt-controller;
59 #interrupt-cells = <1>;
61 interrupt-controller;
83 #interrupt-cells = <1>;
85 interrupt-controller;
109 interrupt-controller;
133 interrupt-controller;
143 #interrupt-cells = <1>;
147 interrupt-controller;
[all …]
A Dqilai-voyager.dts46 #interrupt-cells = <0x1>;
47 interrupt-controller;
69 #interrupt-cells = <0x1>;
70 interrupt-controller;
92 #interrupt-cells = <0x1>;
93 interrupt-controller;
116 interrupt-controller;
147 #interrupt-cells = <0x2>;
148 interrupt-controller;
160 #interrupt-cells = <0x2>;
[all …]
A Dxilinx-mbv32.dts31 cpu0_intc: interrupt-controller {
33 interrupt-controller;
34 #interrupt-cells = <1>;
66 axi_intc: interrupt-controller@41200000 {
69 interrupt-controller;
70 interrupt-parent = <&cpu0_intc>;
71 #interrupt-cells = <2>;
79 interrupt-parent = <&axi_intc>;
90 interrupt-parent = <&axi_intc>;
A Dxilinx-mbv64.dts31 cpu0_intc: interrupt-controller {
33 interrupt-controller;
34 #interrupt-cells = <1>;
66 axi_intc: interrupt-controller@41200000 {
69 interrupt-controller;
70 interrupt-parent = <&cpu0_intc>;
71 #interrupt-cells = <2>;
79 interrupt-parent = <&axi_intc>;
90 interrupt-parent = <&axi_intc>;
/arch/powerpc/dts/
A Dsocrates.dts70 interrupt-parent = <&mpic>;
76 interrupt-parent = <&mpic>;
85 interrupt-parent = <&mpic>;
96 interrupt-parent = <&mpic>;
128 interrupt-parent = <&mpic>;
228 interrupt-controller;
230 #interrupt-cells = <2>;
298 interrupt-controller;
302 #interrupt-cells = <3>;
333 #interrupt-cells = <1>;
[all …]
/arch/mips/dts/
A Djz4780.dtsi10 cpuintc: interrupt-controller {
12 #interrupt-cells = <1>;
13 interrupt-controller;
21 interrupt-controller;
22 #interrupt-cells = <1>;
24 interrupt-parent = <&cpuintc>;
74 interrupt-parent = <&intc>;
88 interrupt-parent = <&intc>;
102 interrupt-parent = <&intc>;
116 interrupt-parent = <&intc>;
[all …]

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