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/arch/mips/mach-ath79/qca956x/
A Dclk.c313 u32 out_div, ref_div, postdiv, nint, hfrac, lfrac, clk_ctrl; in get_clocks() local
339 lfrac = (pll >> QCA956X_PLL_CPU_CONFIG1_NFRAC_L_SHIFT) & in get_clocks()
345 cpu_pll += (lfrac * ref_rate) / ((ref_div * 25) << 13); in get_clocks()
359 lfrac = (pll >> QCA956X_PLL_DDR_CONFIG1_NFRAC_L_SHIFT) & in get_clocks()
363 ddr_pll += (lfrac * ref_rate) / ((ref_div * 25) << 13); in get_clocks()

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