Home
last modified time | relevance | path

Searched refs:lpddr3_ctrl_phy_reset (Results 1 – 2 of 2) sorted by relevance

/arch/arm/mach-exynos/
A Dclock_init.h98 unsigned lpddr3_ctrl_phy_reset; member
A Dclock_init_exynos5.c200 .lpddr3_ctrl_phy_reset = 0x1,
303 .lpddr3_ctrl_phy_reset = 0x1,
406 .lpddr3_ctrl_phy_reset = 0x1,

Completed in 5 milliseconds