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Searched refs:lpddr3phy_ctrl (Results 1 – 2 of 2) sorted by relevance

/arch/arm/mach-exynos/
A Ddmc_init_ddr3.c30 writel(DDR3PHY_CTRL_PHY_RESET_OFF, &clk->lpddr3phy_ctrl); in reset_phy_ctrl()
31 writel(DDR3PHY_CTRL_PHY_RESET, &clk->lpddr3phy_ctrl); in reset_phy_ctrl()
/arch/arm/mach-exynos/include/mach/
A Dclock.h852 unsigned int lpddr3phy_ctrl; member
1267 unsigned int lpddr3phy_ctrl; member

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