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Searched refs:membaseconfig1 (Results 1 – 4 of 4) sorted by relevance

/arch/arm/mach-exynos/
A Dclock_init.h124 unsigned membaseconfig1; member
A Ddmc_init_ddr3.c112 writel(mem->membaseconfig1, &dmc->membaseconfig1); in ddr3_mem_ctrl_init()
583 writel(val, &tzasc0->membaseconfig1); in ddr3_mem_ctrl_init()
584 writel(val, &tzasc1->membaseconfig1); in ddr3_mem_ctrl_init()
A Dclock_init_exynos5.c350 .membaseconfig1 = DMC_MEMBASECONFIG_VAL(0x80),
453 .membaseconfig1 = DMC_MEMBASECONFIG_VAL(0x80),
/arch/arm/mach-exynos/include/mach/
A Ddmc.h175 unsigned int membaseconfig1; member
425 unsigned int membaseconfig1; member

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