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Searched refs:mfspr (Results 1 – 16 of 16) sorted by relevance

/arch/powerpc/cpu/mpc85xx/
A Drelease.S32 mfspr r3, SPRN_HDBCR0
48 mfspr r0,PVR
59 mfspr r3,SPRN_HDBCR1
65 mfspr r3,SPRN_SVR
83 mfspr r3,SPRN_HDBCR0
144 mfspr r0,SPRN_PIR
194 mfspr r8, L1CSR2
232 mfspr r3,L1CSR2
244 mfspr r3,L1CSR2
255 mfspr r3,SPRN_SVR
[all …]
A Dtlb.c56 _mas1 = mfspr(MAS1); in read_tlbcam_entry()
60 *epn = mfspr(MAS2) & MAS2_EPN; in read_tlbcam_entry()
61 *rpn = mfspr(MAS3) & MAS3_RPN; in read_tlbcam_entry()
63 *rpn |= ((u64)mfspr(MAS7)) << 32; in read_tlbcam_entry()
70 unsigned int num_cam = mfspr(SPRN_TLB1CFG) & 0xfff; in print_tlbcam()
106 unsigned int num_cam = mfspr(SPRN_TLB1CFG) & 0xfff; in init_used_tlb_cams()
115 if (mfspr(MAS1) & MAS1_VALID) in init_used_tlb_cams()
211 _mas0 = mfspr(MAS0); in find_tlb_idx()
212 _mas1 = mfspr(MAS1); in find_tlb_idx()
227 unsigned int num_cam = mfspr(SPRN_TLB1CFG) & 0xfff; in init_addr_map()
[all …]
A Dstart.S183 mfspr r3,SPRN_SVR
266 mfspr r1,DBSR
408 mfspr r3,PVR
462 mfspr r3, MAS1
478 mfspr r2, MAS2
491 mfspr r2, MAS3
981 mfspr r4, MAS2
1313 mfspr r4,DAR
1315 mfspr r5,DSISR
1404 mfspr r0,L1CSR1
[all …]
A Dspl_minimal.c37 u32 s = mfspr(SPRN_TBRL); in udelay()
39 while ((mfspr(SPRN_TBRL) - s) < ticks); in udelay()
A Dtraps.c142 mcsrr0 = mfspr(SPRN_MCSRR0); in MachineCheckException()
143 mcsrr1 = mfspr(SPRN_MCSRR1); in MachineCheckException()
144 mcsr = mfspr(SPRN_MCSR); in MachineCheckException()
145 mcar = mfspr(SPRN_MCAR); in MachineCheckException()
A Dcpu_init.c613 u32 l2cfg0 = mfspr(SPRN_L2CFG0); in l2cache_init()
617 while (mfspr(SPRN_L2CSR0) & (L2CSR0_L2FI|L2CSR0_L2LFC)) in l2cache_init()
629 while (!(mfspr(SPRN_L2CSR0) & L2CSR0_L2E)) in l2cache_init()
706 mtspr(L1CSR2, (mfspr(L1CSR2) | L1CSR2_DCWS)); in cpu_init_r()
713 mtspr(L1CSR2, (mfspr(L1CSR2) & ~L1CSR2_DCSTASHID)); in cpu_init_r()
722 if (mfspr(L1CSR2) & L1CSR2_DCWS) in cpu_init_r()
723 mtspr(SPRN_HDBCR0, (mfspr(SPRN_HDBCR0) | 0x80000000)); in cpu_init_r()
A Dinterrupts.c48 mtspr(SPRN_TCR, mfspr(SPRN_TCR) | TCR_PIE); in interrupt_init_cpu()
A Dfdt.c298 u32 l2cfg0 = mfspr(SPRN_L2CFG0); in ft_fixup_l2cache()
391 u32 l1cfg0 = mfspr(SPRN_L1CFG0); in ft_fixup_cache()
392 u32 l1cfg1 = mfspr(SPRN_L1CFG1); in ft_fixup_cache()
495 svr = mfspr(SPRN_SVR); in ft_fixup_qe_snum()
A Dmp.c29 return mfspr(SPRN_PIR); in get_my_id()
A Dcpu.c316 val = mfspr(DBCR0); in do_reset()
/arch/powerpc/include/asm/
A Dppc.h40 return mfspr(SPRN_IMMR); in get_immr()
45 return mfspr(PVR); in get_pvr()
50 return mfspr(SVR); in get_svr()
A Dcache.h107 return mfspr(IC_CST); in rd_ic_cst()
122 return mfspr(DC_CST); in rd_dc_cst()
A Dprocessor.h1114 #define mfspr(rn) ({unsigned int rval; \ macro
/arch/powerpc/cpu/mpc8xx/
A Dcache.c15 return !!(mfspr(IC_CST) & IDC_ENABLED); in icache_status()
33 return !!(mfspr(IC_CST) & IDC_ENABLED); in dcache_status()
A Dstart.S77 mfspr r3, ICR /* clear Interrupt Cause Register */
90 mfspr r3, IC_CST /* Clear error bits */
91 mfspr r3, DC_CST
201 mfspr r4,DAR
203 mfspr r5,DSISR
/arch/powerpc/cpu/mpc83xx/
A Dstart.S314 mfspr r4,DAR
316 mfspr r5,DSISR
725 mfspr r3, HID0
738 mfspr r3, HID0
748 mfspr r3, HID0
755 mfspr r3, HID0
767 mfspr r3, HID0
780 mfspr r3, HID0
1065 mfspr r0, HID0
1089 mfspr r3, HID0

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