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Searched refs:mpll_pdiv (Results 1 – 2 of 2) sorted by relevance

/arch/arm/mach-exynos/
A Dclock_init.h48 unsigned mpll_pdiv; member
A Dclock_init_exynos5.c144 .mpll_pdiv = 0x3,
268 .mpll_pdiv = 0x3,
371 .mpll_pdiv = 0x3,
584 writel(mem->mpll_pdiv * PLL_LOCK_FACTOR, &clk->mpll_lock); in exynos5250_system_clock_init()
626 val = set_pll(mem->mpll_mdiv, mem->mpll_pdiv, mem->mpll_sdiv); in exynos5250_system_clock_init()
794 writel(mem->mpll_pdiv * PLL_LOCK_FACTOR, &clk->mpll_lock); in exynos5420_system_clock_init()
847 val = set_pll(mem->mpll_mdiv, mem->mpll_pdiv, mem->mpll_sdiv); in exynos5420_system_clock_init()

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