1 /* SPDX-License-Identifier: GPL-2.0+ */ 2 /* 3 * Copyright (C) 2015, Bin Meng <bmeng.cn@gmail.com> 4 */ 5 6 #ifndef _QUARK_MSG_PORT_H_ 7 #define _QUARK_MSG_PORT_H_ 8 9 /* 10 * In the Quark SoC, some chipset commands are accomplished by utilizing 11 * the internal message network within the host bridge (D0:F0). Accesses 12 * to this network are accomplished by populating the message control 13 * register (MCR), Message Control Register eXtension (MCRX) and the 14 * message data register (MDR). 15 */ 16 #define MSG_CTRL_REG 0xd0 /* Message Control Register */ 17 #define MSG_DATA_REG 0xd4 /* Message Data Register */ 18 #define MSG_CTRL_EXT_REG 0xd8 /* Message Control Register EXT */ 19 20 /* Normal Read/Write OpCodes */ 21 #define MSG_OP_READ 0x10 22 #define MSG_OP_WRITE 0x11 23 24 /* Alternative Read/Write OpCodes */ 25 #define MSG_OP_ALT_READ 0x06 26 #define MSG_OP_ALT_WRITE 0x07 27 28 /* IO Read/Write OpCodes */ 29 #define MSG_OP_IO_READ 0x02 30 #define MSG_OP_IO_WRITE 0x03 31 32 /* All byte enables */ 33 #define MSG_BYTE_ENABLE 0xf0 34 35 #ifndef __ASSEMBLY__ 36 37 #include <linux/types.h> 38 39 /** 40 * msg_port_setup - set up the message port control register 41 * 42 * @op: message bus access opcode 43 * @port: port number on the message bus 44 * @reg: register number within a port 45 */ 46 void msg_port_setup(int op, int port, int reg); 47 48 /** 49 * msg_port_read - read a message port register using normal opcode 50 * 51 * @port: port number on the message bus 52 * @reg: register number within a port 53 * 54 * @return: message port register value 55 */ 56 u32 msg_port_read(u8 port, u32 reg); 57 58 /** 59 * msg_port_write - write a message port register using normal opcode 60 * 61 * @port: port number on the message bus 62 * @reg: register number within a port 63 * @value: register value to write 64 */ 65 void msg_port_write(u8 port, u32 reg, u32 value); 66 67 /** 68 * msg_port_alt_read - read a message port register using alternative opcode 69 * 70 * @port: port number on the message bus 71 * @reg: register number within a port 72 * 73 * @return: message port register value 74 */ 75 u32 msg_port_alt_read(u8 port, u32 reg); 76 77 /** 78 * msg_port_alt_write - write a message port register using alternative opcode 79 * 80 * @port: port number on the message bus 81 * @reg: register number within a port 82 * @value: register value to write 83 */ 84 void msg_port_alt_write(u8 port, u32 reg, u32 value); 85 86 /** 87 * msg_port_io_read - read a message port register using I/O opcode 88 * 89 * @port: port number on the message bus 90 * @reg: register number within a port 91 * 92 * @return: message port register value 93 */ 94 u32 msg_port_io_read(u8 port, u32 reg); 95 96 /** 97 * msg_port_io_write - write a message port register using I/O opcode 98 * 99 * @port: port number on the message bus 100 * @reg: register number within a port 101 * @value: register value to write 102 */ 103 void msg_port_io_write(u8 port, u32 reg, u32 value); 104 105 /* clrbits, setbits, clrsetbits macros for message port access */ 106 107 #define msg_port_normal_read msg_port_read 108 #define msg_port_normal_write msg_port_write 109 110 #define msg_port_generic_clrsetbits(type, port, reg, clr, set) \ 111 msg_port_##type##_write(port, reg, \ 112 (msg_port_##type##_read(port, reg) \ 113 & ~(clr)) | (set)) 114 115 #define msg_port_clrbits(port, reg, clr) \ 116 msg_port_generic_clrsetbits(normal, port, reg, clr, 0) 117 #define msg_port_setbits(port, reg, set) \ 118 msg_port_generic_clrsetbits(normal, port, reg, 0, set) 119 #define msg_port_clrsetbits(port, reg, clr, set) \ 120 msg_port_generic_clrsetbits(normal, port, reg, clr, set) 121 122 #define msg_port_alt_clrbits(port, reg, clr) \ 123 msg_port_generic_clrsetbits(alt, port, reg, clr, 0) 124 #define msg_port_alt_setbits(port, reg, set) \ 125 msg_port_generic_clrsetbits(alt, port, reg, 0, set) 126 #define msg_port_alt_clrsetbits(port, reg, clr, set) \ 127 msg_port_generic_clrsetbits(alt, port, reg, clr, set) 128 129 #define msg_port_io_clrbits(port, reg, clr) \ 130 msg_port_generic_clrsetbits(io, port, reg, clr, 0) 131 #define msg_port_io_setbits(port, reg, set) \ 132 msg_port_generic_clrsetbits(io, port, reg, 0, set) 133 #define msg_port_io_clrsetbits(port, reg, clr, set) \ 134 msg_port_generic_clrsetbits(io, port, reg, clr, set) 135 136 #endif /* __ASSEMBLY__ */ 137 138 #endif /* _QUARK_MSG_PORT_H_ */ 139