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Searched refs:odt (Results 1 – 7 of 7) sorted by relevance

/arch/arm/dts/
A Drk3288-veyron-u-boot.dtsi24 rockchip,odt-disable-freq = <333000000>;
/arch/arm/include/asm/arch-rockchip/
A Dsdram_rk3288.h99 u32 odt; member
A Dsdram_common.h249 unsigned int odt; member
A Dsdram_rk322x.h270 u32 odt; member
/arch/x86/dts/
A Dgalileo.dts59 rd-odt-value = <DRAM_RD_ODT_OFF>;
A Dchromebook_coral.dts718 fspm,ch0-odt-config = <CHX_ODT_CONFIG_DDR4_CA_ODT>;
724 fspm,ch1-odt-config = <CHX_ODT_CONFIG_DDR4_CA_ODT>;
730 fspm,ch2-odt-config = <CHX_ODT_CONFIG_DDR4_CA_ODT>;
736 fspm,ch3-odt-config = <CHX_ODT_CONFIG_DDR4_CA_ODT>;
/arch/arm/mach-sunxi/
A DKconfig759 bool "sunxi dram odt enable"
768 Select this to enable dram odt (on die termination).
840 int "sunxi dram odt correction value"
843 Set the dram odt correction value (range -255 - 255). In allwinner

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