Home
last modified time | relevance | path

Searched refs:opcode (Results 1 – 7 of 7) sorted by relevance

/arch/arm/mach-zynq/
A Dps7_spl_init.c88 unsigned long opcode; in ps7_config() local
97 opcode = ptr[0]; in ps7_config()
98 if (opcode == OPCODE_EXIT) in ps7_config()
100 addr = (opcode & OPCODE_ADDRESS_MASK); in ps7_config()
102 switch (opcode & ~OPCODE_ADDRESS_MASK) { in ps7_config()
/arch/riscv/include/asm/
A Dinsn-def.h32 #define __INSN_I(opcode, func3, rd, rs1, simm12) \ argument
33 ".insn i " opcode ", " func3 ", " rd ", " rs1 ", " simm12 "\n"
35 #define INSN_I(opcode, func3, rd, rs1, simm12) \ argument
36 __INSN_I(RV_##opcode, RV_##func3, RV_##rd, \
/arch/x86/cpu/
A Dmtrr.c343 enum mtrr_opcode opcode; member
355 switch (oper->opcode) { in mtrr_do_oper()
389 oper.opcode = MTRR_OP_SET_VALID; in mtrr_set_valid()
400 oper.opcode = MTRR_OP_SET; in mtrr_set()
/arch/arm/include/asm/
A Dopcodes.h11 extern asmlinkage unsigned int arm_check_condition(u32 opcode, u32 psr);
/arch/mips/mach-octeon/include/mach/
A Dcvmx-pow.h225 u64 opcode : 3; member
253 u64 opcode : 3; member
281 u64 opcode : 3; member
942 load_addr.sstatus_cn68xx.opcode = 3; in cvmx_pow_get_current_tag()
993 load_addr.sstatus_cn68xx.opcode = 4; in cvmx_pow_get_current_wqp()
/arch/mips/include/asm/
A Dmipsregs.h1125 u16 opcode = (insn >> 10) & 0x7; in mm_insn_16bit() local
1127 return (opcode >= 1 && opcode <= 3) ? 1 : 0; in mm_insn_16bit()
/arch/arm/include/asm/arch-octeontx2/csrs/
A Dcsrs-nix.h5273 u64 opcode : 16; member

Completed in 85 milliseconds